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  Hi Team   Am working on a custom hardware design using the STM32H745IIT6 microcontroller and interfacing it with an external SDRAM   IS42S83200J-7TLI.  Any available reference designs, including: Schematic diagrams PCB layout design files  Application notes or design guidelines specific to STM32H7 FMC/SDRAM interface If anyone has experience with a similar configuration or can share reference projects, evaluation boards, or design tipsespecially related to signal integrity, routing, or SDRAM timing configurationit would be very helpful. Regards, Sathiya    

Hi all,   I am working on a project where I have a clock generated from a 25MHz crystal oscillator and multiplied by a PLL to 100MHz. I want to feed this clock directly to the HSE input of my STM32G431CBU in order to achieve a 100MHz HCLK clock, which should be ok given that the maximum acceptable frequency is 170MHz. STM32CubeMX throws in an error saying that the clock input frequency is too high ("maximum should be 48MHz"). However according to table 55 in the datasheet (link below), the IO used for HSE input (PF0, IO structure FT_fa) should be able to function at 100MHz at speed 10 and even faster at speed 11, which are specified to be hardware limitations. https://www.st.com/resource/en/datasheet/stm32g431c6.pdf Can I force STM32CubeMX to just roll with it / trick it into accepting it? Is my STM32G431 just going to vaporize in a puff of smoke if I try it anyway?   Thanks!

Hello, world. I try to find answer how read that code: 2020L.  Full text on chip are:  M27C801 -100F1 52987 -2020L SINGAPORE   That 2020L need read like: WWYXX? Or YWWXX? Thank you for answer. Regards  ?

I am using NUCLEO-F303RE board. I couldn't find ES and E marking in the product information of the datasheet. Does it mean it is not "ES" and "E" marked. can any one please confirm it.

I designed a board with a layout that I was very happy with, but this meant remapping FDCAN1_TX to PC14, which CubeMX dutifully created code for... However, the code wouldn't compile.  I needed to get my board order in that day so I simply adjusted the pin arrangement and modified the layout, but it looks for all the world as though there are some missing defines.  I say this because the datasheet quite clearly states this as a valid remapping. Just thought I'd put this out there. Maybe the fix is as simple as:-#define GPIO_AF13_FDCAN1 13 I may revisit this in the near future and I am aware there are some other remapping issues others have tripped up on.  I guess it's because this is a relatively new part.  It only came out in Feb 2025. Does anybody else know anything about this issue?

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Hi everyone,I am checking the STM32N6 series package options and I would like to confirm one point.Does the 66 mm package of the STM32N6 series expose the pins required to use the SDMMC controller?I understand that SDMMC support may depend not only on the MCU series, but also on the specific package and pin availability. I have seen SDMMC listed in the device features, but I am not sure whether it is actually usable on the 66 mm package.Specifically, I would like to know:Is SDMMC available on the STM32N6 66 mm package? If yes, does it support a practical SD/eMMC interface, such as 4-bit mode? Are there any package or pin-mux limitations I should be aware of?Any confirmation from someone who has checked the datasheet/pinout or used this package would be appreciated.Thanks!

Hello, I cloned the repository https://github.com/STMicroelectronics/STM32CubeF3.git but importing the project ...STM32F3-DiscoveryExamplesBSP some code is missing in particular the code to manage the BSP device on the STM32F3DISCOVERY BOARD. What I am missing? Thanks in advance Adriano

Hello everyone, may I ask what is the maximum clock frequency supported when the STM32H7's FMC peripheral controls SDRAM? Can it work stably if the frequency exceeds 200MHz, for example, 240MHz?     Thank you very much.?

Could you please share the schematic file/pdf for STM32H753ZI nucleo board .. or reference link 

What are the differences between those two devices? The datasheet only says that the N means "N product version". In the STMicroelectronics eStore, the only difference is that there's a Material Declaration for the STM32C071RBT6, but not for the STM32C071RBT6N. And the STM32C071RBT6 is slightly cheaper.

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Hello,I am designing a system that must continuously capture data from a 30 MSPS, 16?bit parallel ADC into a 16?bit SDRAM using a circular buffer.The DCMI peripheral is not suitable for this parallel ADC interface because no VSYNC or HSYNC signals are availableonly the ADC clock is provided. Consequently, the most appropriate peripheral appears to be the PSSI (Parallel Synchronous Slave Interface).I would prefer to use an STM32H7 series MCU running at 550 MHz. To my knowledge, the models that integrate both an SDRAM?capable FMC and a PSSI peripheral are the STM32H723, STM32H725, STM32H730, and STM32H735.A standard 16?bit SDRAM with 13 address lines and 4 banks requires 39 control signals when including FMC_NBL0 and FMC_NBL1 for the byte enables. The 16?bit ADC supplies 17 signals (16 data lines plus a clock). The total pin count is therefore

We are using STM32H743 and STM32H745 in our product lines and embedded bootloader is used for boot loading. The PB14 pins is used as Debug Uart on USART1.  The PA9 pin is left unconnected. Its Not Connected pin. Is there any impact on this upgrade.  The ST Application notes says that in V9.2, the same data output issue on V9.1 is fixed. Since PA9 is not used in schematics, there is no impact on this upgrade. This is my preliminary assessment. Anybody please confirm if my understating is correct.  Thanks in advance  

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Dear ST Support Team,I am working on a reliability calculation for an industrial hardware design. I need the official failure rate data for the following components: STM32F405RGT6: FIT rates or MTBF, and failure mode or FMECA report. STM32H743VGT6:  FIT rates or MTBF, and failure mode or FMECA report. Could you please provide the available documentation for these parts?Best regards,

Hi, I have a problem configuring SPI3 on a NUCLEO-H7S3L8 board. Im writing directly to registers and not using any ready-made functions. I configured SPI3 and everything works correctly as long as I use PB4 as MISO. However, I wanted to use PC11 instead, and then I only read 0xFF. Im using exactly the same settings for PC11 as for PB4, and both are configured with AF6. My question is: does PC11 require any special configuration, or maybe something on the Nucleo board blocks it from being used this way?

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Hello,rather simple issue I have, I am trying to figure out the connection between the actual port naming on my board and the GPIOs defined within Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h for example. I cant find the reference, where are PB7 or PB6  on my board if I want to connect these to some other module through  wiring:(

Hi all, I'm developing a board based on the STM32H755ZIT3 LQFP144 MCU, and I'm studying the Nucleo-144 board to understand the best routing practices. By extracting the PCB and schematic libraries for this component from the original ST project, I found something I can't quite explain: the four 45-degree slanted pads at the corners. They are not connected to any net, and when routing the top layer they split the top ground plane into that unpleasant hourglass-shaped area interrupted by the pads marked as 0, as you can see in the attached screenshot. Could their purpose be to avoid ground loops? Since this chip has no exposed pad, it doesn't seem to be related to thermal relief or mechanical stress. I don't think they are there to solve clearance or parasitic capacitance issues either, because the polygon already stays quite close to the corner pads. I also noticed that no other libraries I found, such as UltraLibrarian or SamacSys, use those pads. From what I can see, only ST routes th

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.In the STM32H753xI(MCU) datasheet(https://www.st.com/resource/en/datasheet/stm32h753vi.pdf) the pins PI2, PI3 provide the functionality for SPI2_MISO and SPI2_MOSI respectively. But in the STM32H7-MB1246- E03 EVAL  board schematic(https://www.st.com/resource/en/schematic_pack/mb1246-h753-e03_schematic.pdf) the above pins are mapped to netlabels D26 and D27 respectively which are mapped to the SDRAM. Can I use the SPI functionality using these pins in the STM32H7-MB1246- E03 EVAL board?When a pin is assigned as an alternate function does it mean that the pin is directly connected to that paritcular net( in this case D26 and D27) by default in the EVAL board? Or is the external connector in the EVAL board directly connected to the GPIO(PI2, PI3)?(This image is from the user manual:(https://www.st.com/resource/en/user_manual/um2198-evaluation-bo

  I wrote a Python book, but I am new at STM32. I bought a STM32F407G Discovery Board. And I bought related books. A related book describes the Stm32Cube IDE. But it used version 1.12.1 He started the project with "Fille--New--STM32 Project" . Then the program opens the STM32CubeMX. But the version of my STM32cubeIDE  is 2.11. and there is no "STM32 Projects" in File--New. From where should I  start for a new STM32 project in version 2.11?  And how do I reach to STM32CubeMX window  from STM32CubeIDE 2.11? 

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Hello, I am struggling getting my code generated and to compile it..I am working on VirtualBox with Ubuntu OS, and I have downloaded the standard Linux STM32CubeIDE.When creating a project, my mcu ode is not being generated within the files.. I had also installed the STM32CubeMX and was able to select my HW there and I get my code generated properly.. but I cant import it into STM32CubeIDE... if I import, then I cannot Build the code... (picture below)

Hi everyone, I have a schematic using the Realtek RTL8211F-CG Gigabit Ethernet PHY and I want to connect it directly to an STM32H7 microcontroller for Ethernet communication. My questions are: The STM32H7 Ethernet MAC supports MII and RMII only. The RTL8211F-CG is a Gigabit PHY that primarily uses RGMII. Is there any way to make it work with STM32H7 without adding an intermediate chip like LAN8720 or DP83848? The RTL8211F-CG datasheet mentions it can operate at 10/100 Mbps as well but does it support a true RMII mode that the STM32H7 MAC can talk to? Has anyone successfully used the RTL8211F-CG with STM32H7 directly? If so, what interface mode did you configure on the PHY side, and what changes were needed in CubeMX/HAL? If this is not possible at all, what is the simplest/cheapest alternative 10/100 PHY that works reliably with STM32H7 in RMII mode? Any help or experience is appreciated. Thanks!

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Dear STMicroelectronics Team,We would like to request clarification regarding the delivery schedule of our STM32WL5MOCH6TR orders.As indicated in the attached correspondence and supply reports, we were initially informed that our order would be delivered in June 2026. Based on this commitment, we planned our production schedules, project milestones, and customer deliveries accordingly.However, after requesting an updated status, we were informed that the estimated delivery date had been postponed to February 2027.This change represents an approximately eight-month delay and creates a significant risk for our ongoing projects and contractual commitments, including projects for public institutions.We kindly ask for your support in confirming whether the latest delivery date is accurate and final. If there is indeed a supply constraint that will

I am using the STM32H7B3I-EVAL board. I checked STM32CubeH7. Since the board supports camera (DCMI) . Any camera demo project for testing LCD preview Availability of prebuilt binaries (.hex / .bin / .elf) for quick hardware testing Goal: quick validation of camera Please share any working example or reference.

Subject: STM32U5A5: Unexpected behavior on PA11 when used as SPI1_MISO Hi,We observed unexpected behavior on STM32U5A5 devices when using PA11 as SPI1_MISO.The issue has been reproduced on multiple STM32U5A5 devices from different production batches as well as on an STM32U5A5 evaluation board. The same software and hardware setup works correctly on an STM32U585. Description===========When SPI1 is enabled and PA11 is configured as MISO, the pin appears to load the signal unexpectedly.In our setup, the external SPI device drives the MISO line push-pull. However, the signal level reaches only about 2.9 V when active. When the SPI device is inactive (CS de-asserted), the signal drops only to about 2.3 V. To exclude the external SPI device as the root cause, we disconnected it completely and performed a simple GPIO test:- PA11 configured as GPIO input- PA11 connected to 3.3 V through a 10 kΩ resistorExpected result:- PA11 voltage close to 3.3 VActual result:- PA11 voltage only slightly abov

I am developing a control board based on the STM32G474RE microcontroller. This board is self‑designed using Board Designer within Workbench 6.4.2. After configuration and project generation in Workbench, the generated project works fine. The HSO option can be enabled, and no errors or warnings are reported for all parameters. Compilation in MDK‑ARM completes without any issues. I have reviewed the initialization code for ADC1 and ADC2, which are used for phase‑current and phase‑voltage sensing. In principle, the HSO measurement mechanism relies on synchronization with the PWM signals. The PWM waveforms are generated by TIM1. However, I observe that TIM3 is configured as the input trigger source for the ADCs in the initialization code, instead of TIM1 as I expected. Is this a bug in the code‑generation output? Please provide assistance.今天 11:32聊聊新话题

Subject: YOLOv8n ONNX conversion fails with "region 'ROM' overflowed by 5601536 bytes" on STM32N6570-DKI am trying to convert and generate a YOLOv8n ONNX model for the STM32N6570-DK using STM32Cube AI Studio / ST Edge AI Core.My target configuration is:Board: STM32N6570-DK Accelerator: ST Neural-ART RAM: 4200 KB Internal Flash: 0 KB External RAM: 32 MB External Flash: 128 MB Mode: On targetHowever, the generation fails with the following error:region 'ROM' overflowed by 5601536 bytesSince the STM32N6570-DK has 128 MB of external Flash, I would like to understand why the ROM region overflows and whether the model/data can be placed in external Flash.What memory configuration or settings should I use to deploy YOLOv8n on the STM32N6570-DK?I have attached the complete log and the ONNX model.  YOLOv8n　Data↓https://github.com/ultralytics/assets/releases/download/v8.4.0/yolov8n.pt