LQFP 144 footrpint

[GuiOtt]

Hi all,

I'm developing a board based on the STM32H755ZIT3 LQFP144 MCU, and I'm studying the Nucleo-144 board to understand the best routing practices.

By extracting the PCB and schematic libraries for this component from the original ST project, I found something I can't quite explain: the four 45-degree slanted pads at the corners. They are not connected to any net, and when routing the top layer they split the top ground plane into that unpleasant hourglass-shaped area interrupted by the pads marked as 0, as you can see in the attached screenshot.

Could their purpose be to avoid ground loops? Since this chip has no exposed pad, it doesn't seem to be related to thermal relief or mechanical stress. I don't think they are there to solve clearance or parasitic capacitance issues either, because the polygon already stays quite close to the corner pads. I also noticed that no other libraries I found, such as UltraLibrarian or SamacSys, use those pads.

From what I can see, only ST routes the footprint this way. Other board designers usually place a keep-out area under the chip to avoid any plane underneath it, and I would think that is a cleaner approach than adding these pads. I'm planning to use a 6-layer PCB with the same stackup, including a GND plane immediately below the top layer, so the GND pins can be connected very closely to the ground plane underneath.

Does anyone know the real purpose of those pads?

Thanks in advance for your help.

 

[GuiOtt]

Thanks a lot!
There isnt any magical reason just a very practical one.
Kind regards

[mƎALLEm]

Hello,

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 wrote:

By extracting the PCB and schematic libraries for this component from the original ST project, I found something I can't quite explain: the four 45-degree slanted pads at the corners. They are not connected to any 

Does anyone know the real purpose of those pads?

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These pads are used for LQFP144 socket.

From the BOM of the board.