Solved

Here is the software setting:​For STM32H735(STM32H745 is the same but with different ID):-Defines:/* USER CODE BEGIN PV */FDCAN_TxHeaderTypeDef TxHeader;FDCAN_RxHeaderTypeDef RxHeader;uint8_t TxData_Node1_To_Node2[] = {0x10, 0x32, 0x54, 0x76, 0x98, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66};uint8_t RxData_From_Node2[12];/* USER CODE END PV */ -FDCAN:  ​ hfdcan1.Instance = FDCAN1; hfdcan1.Init.FrameFormat = FDCAN_FRAME_FD_BRS; hfdcan1.Init.Mode = FDCAN_MODE_NORMAL; hfdcan1.Init.AutoRetransmission = ENABLE; hfdcan1.Init.TransmitPause = DISABLE; hfdcan1.Init.ProtocolException = DISABLE; hfdcan1.Init.NominalPrescaler = 1; hfdcan1.Init.NominalSyncJumpWidth = 13; hfdcan1.Init.NominalTimeSeg1 = 86; hfdcan1.Init.NominalTimeSeg2 = 13; hfdcan1.Init.DataPrescaler = 2; hfdcan1.Init.DataSyncJumpWidth = 12; hfdcan1.Init.DataTimeSeg1 = 12; hfdcan1.Init.DataTimeSeg2 = 12; hfdcan1.Init.MessageRAMOffset = 0; hfdcan1.Init.StdFiltersNbr = 1; hfdcan1.Init.ExtFiltersNbr = 0; hfdcan1.Init.RxFifo0ElmtsNbr = 1;

We have some devices based on STM32MP257 SoCs that connect to a 100 Mbit Ethernet network via ETH1, where ETH1 is going straight to an RMII PHY. Pins for ETH2 are reserved, but are not used/not connected. Some of our devices work rock-solid as excepted, but others exhibit massive performance problems on the Ethernet connection.After lots of research, we think that our devices are affected by a silicon bug described in errata sheet ES ES0598 as "ETH1 RMII mode could have CRC errors". Our chip revisions are all rev Y, which are affected by the issue. The errata says that ETH1 should be routed through ETHSW to work around the silicon bug. To test if the workaround works for our case, I've tried to enable ETHSW, but failed so far because STM32CubeMX forces me to free some pins before it allows me to enable ETHSW in RMII mode. It seems like ETH1 and ETH3 must be used together if ETHSW is enabled, the pins for ETH3, however, are already used for other hardware functions.So, my goal is to- en

I would be interested in implementing a FDCAN communication between two STM32H747 MCU boards. I have implemented communication on a single board in External LoopBack mode. However, I am having problems understanding how to connect the two boards. Do any of you know how to do this, or do you know a good guide?

Is there a way to detect a CAN message loss in a RX Fifo when in the overwrite mode (so an overwrite?)

Hello,I have no CAN experience, but I have to decide soon if we can use the STM32 (prob. H7) with its CAN-FD interface.To me with my limited CAN knowledge it looks like it supports all hardware necessities, like "old & slow" CAN and the newer, faster version with bitrate change.But to make sure that I am not missing something important :What are the limitations of the STM32 CAN-FD ? What's your experience?Thanks in advance! Edit: I have checked / am reading AN5348 and the STM32 CAN-FD "presentation"

Hello,The latest version of STM32CubeWL (1.6.0), based on the Semtech LBM stack, does not support FUOTA.What is the recommended solution for a new project that requires FUOTA? Should we use an older version of STM32CubeWL (v1.1) that have FUOTA example code?Do you have an estimated date for when FUOTA will be available in the latest version of STM32CubeWL?Best regards,Mathias

Hi everyone,I am currently experiencing some issues with the FDCAN interface; my setup consists of two nucleo boards (Nucleo-G0B1RE) which use FDCAN interface to communicate with each other. As transceivers I am using two ATA6563-click boards.The clock used for FDCAN interface is PLLQ which ticks at 32MHz. The FDCAN parameters were configured using kvaser canfd timing calculator; Filters are disabled.I’ve generated two set of parameters:Nominal bitrate 500 kBit/s; Data bitrate: 2MBit/s Nominal bitrate 500 kBit/s; Data bitrate: 4MBit/s In both scenarios I’ve used a payload of 12 bytes and preserved the sending header:txh_n1.Identifier = 0x1ad; txh_n1.IdType = FDCAN_STANDARD_ID; txh_n1.TxFrameType = FDCAN_DATA_FRAME; txh_n1.DataLength = FDCAN_DLC_BYTES_12; txh_n1.ErrorStateIndicator = FDCAN_ESI_ACTIVE; txh_n1.BitRateSwitch = FDCAN_BRS_ON; txh_n1.FDFormat = FDCAN_FD_CAN; txh_n1.TxEventFifoControl = FDCAN_NO_TX_EVENTS; txh_n1.MessageMarker = 0x0;and the same while loop:bo

Hello,I am working on a CANbus communication with a critical system component that, if it is NOT communicating, portions of the systems should be shut down. I am trying to come up with a way to determine if communication is lost, but I feel like the solutions I'm coming up with are way more complicated than they need to be. One feature that I noticed is AutoRetransmission in the CAN configuration. So it will try to resend the message if it does not get an ACK from the device it's communicating with. Is there a way to keep track of how many transmission attempts have occurred with no response from a specific node? If so, then I can just say "If the message failed to send X times, then communication is lost and react accordingly."Does anyone know if this exists and, if so, how to implement something like this?For reference, I am using the STM32H7B3IIT6 MCU.

Hello I tried to receive any CAN signal on my device based on STM32F303CCT6. Maybe you have solution :), CAN pins are remapped on PB9 and PB8 pins by STMCubeMX configuratorBelow my code (main.c): https://pastecode.io/s/7av2ge6mand my settings in configurator:I also set CAN RX pull HIGH using the internal pull-up, like in the tutorial https://controllerstech.com/can-protocol-in-stm32/Thanks for help

Normal mode of FDCAN is not working. Attached project file here. Please suggest if any changes are required in the attached files.

Hello!I am facing a problem with the STM32H563VIT6 trying to set up MQTT client. I tried to take STM32H573I-DK\Applications\NetXDuo\Nx_MQTT_Client example as a base example on how to do it, but it has not worked for me. The problem I am facing is that no IP can be acquired and thus the MQTT client will not work. I have set up everything correctly in the netxduo header file (DNS, MQTT broker name).What I am trying to achieve right now is to have the board send simple MQTT packets to my computer (like in the STM32H573I exmaple). The board is connected to the router.I tested a simple MQTT packet sending by doing it from my phone to my computer. Also, connected my phone to the router via an Ethernet cable, and with using the Wi-Fi. In both times, the test was successful, so from that it seems that the problem cannot be in my computer or in the router.When debugging the program the error I receive is from the App_Link_Thread_Entry. Getting this error after calling nx_ip_interface_statu

Hello, I initialized CAN on STM32F429ZIT6 on registers. I would like to tranmitt and receive messages. But on transmission lines is silence. In my opinion I forgot about any register, but I don't know which. So could you help me what i sholud change in my code?

Hi, I am using the following:cubeIDE 1.13.1/STM32F072C8U6/baud = 250K - I attached a picture of my clock diagram & param setup.Hi, I am using the following:cubeIDE 1.13.1/STM32F072C8U6/baud = 250K - I attached a picture of my clock diagram & param setup.I do not see messages sending on the CAN bus. They worked fine in my previous IDE. I have a feeling it has to due with the time quanta but not 100% sure. I tried adjusting to quanta 10/5 after reading the following with no luck:http://www.bittiming.can-wiki.info/ Init:static void MX_CAN_Init(void){/* USER CODE BEGIN CAN_Init 0 *//* USER CODE END CAN_Init 0 *//* USER CODE BEGIN CAN_Init 1 *//* USER CODE END CAN_Init 1 */hcan.Instance = CAN;hcan.Init.Prescaler = 32;hcan.Init.Mode = CAN_MODE_NORMAL;hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;hcan.Init.TimeSeg1 = CAN_BS1_1TQ;hcan.Init.TimeSeg2 = CAN_BS2_1TQ;hcan.Init.TimeTriggeredMode = DISABLE;hcan.Init.AutoBusOff = DISABLE;hcan.Init.AutoWakeUp = DISABLE;hcan.Init.AutoRetransmission = DI

Hi, I am new to TouchGFX Designer and I saw the previous reply in 2023 mentioning that the team was internally discussing the possibility of importing Figma UI designs into TouchGFX Designer.Is there a way to import Figma UI Design to TouchGFX Designer? May I ask if there has been any update or progress on this feature since then?In addition to the Figma import question, I would also like to ask whether TouchGFX Designer currently provides any form of plugin or extension support.Specifically, is there a way to add a custom entry in the Designer menu or integrate a custom code-generation workflow into the tool? Thanks in advance for any information.

Hello,We are going to use the STM32H573 MCU (STM32H573IIK3Q) on our board, and we are now preparing for mass production. Production will be done at an external contract manufacturer (not in-house), and we need to provision keys and firmware securely during programming.My main question: Is the STM32HSM-V2 card strictly required for secure programming at high volume, or are there supported alternatives?Specifically:1. As far as I understand, the SFI license mechanism is tied to ST's key hierarchy inside the ROM bootloader, so a third-party/commercial HSM (Thales, nShield, etc.) cannot generate licenses that the chip will accept. Is that correct, or is there any supported way to run SFI with our own HSM infrastructure instead of the ST smartcard?2. If STM32HSM-V2 is the only option: for volumes well beyond 300 units, V2ML (10K) and V2HL (100K) do not seem to be orderable through distributors. Is the intended path to request them through an ST sales office, and what lead time should we pla

Hi! When trying to run the code in STM32CubeIDE (“Run as”) I see the error“No ST-LINK detected! Please connect ST-LINK and restart the debug session.”.In error log I also see the message“Cannot run program "/usr/local/bin/stlink-server" (in directory "/Users/<username>"): Exec failed, error: 86 (Bad CPU type in executable)”This started to happen after updating to MacOS 27.0 (Golden Gate) from version 26. Before that it was working fine.Also the board can be seen by STM32CubeProgrammer (see screenshot).Also I installed as a separate package ST-LINK-SERVER 2.1.1 (https://www.st.com/en/development-tools/st-link-server.html)Board: Nucleo-F446RELaptop: Apple M4 Pro with MacOS 27.0IDE: STM32CubeIDE Version: 2.2.0 Build 29186_20260626_0934 (UTC)    

Split from this post: Dear ST Technical Moderator,(mEALLEm)many thanks for your prompt answer !You actually solved my problem by using CubeMX2 tool,where one can assign selected peripheral pins (in my case COMP2 two inputs and one output)to actual package IO pins.As far as I see, CubeMX2 tool “offered” to make assignment of Comparator Plus input with one of four IO pinsCOMP2_INP:IO1: PA3IO2: PB15IO3: PC0(I want to use PA3) !and Comparator Minus input with one of four IO pinsCOMP2_INM:IO1: PC1IO2: PC5IO3: PA2(I want to use PA2) !it is stated in my text, in the very beginning !... quoteIn new design,  where planned MCU is STM32C542CCT6 device, (LQFP48 package),I plan to use internal Comparator COMP2....PA7 pin as Comparator2 Outputand pin PA2 as Comparator2 -INPut, and pin PA3 as Comparator2 +INPut.... unquoteWell, the only problem is that I did not install SW development environment yet,so, I did not use CubeMX2 tool, I was just reading the documentation, RefManual and device DS,and I d

The linker file is expected to be in the root directory instead of the subdirectoryI have a project that has to compile for two STM32 hardware platforms:- the Nucleo-F446RE development board- the STM32G051 microcontrollerThe project is developed in VS Code.The .ioc file has been moved from the root directory to two subdirectories:./target/nucleo_f446re./target/g051In the file CMakePresets.json        {            "name": "nucleo_f446re",            "inherits": "default",            "cacheVariables": {                "CMAKE_BUILD_TYPE": "Debug",                "STM32_TARGET": "nucleo_f446re"            },            "toolchainFile": "${sourceDir}/targets/nucleo_f446re/cmake/gcc-arm-none-eabi.cmake"        }, The gcc-arm-none-eabi.cmake file is generated by STM32CubeMX. It contains the following line:set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -T \"${CMAKE_SOURCE_DIR}/STM32F446XX_FLASH.ld\"")This means that the linker script is expected to be in the root directory of the projec

According to the STM32MP257 datasheet:"1× USB 2.0/3.0 high-speed/SuperSpeed dual role data with embedded 480 Mbits/s and 5 Gbits/s PHY" "1× PCI Express with embedded 5 Gbits/s PHY (PHY shared with USB 3.0 SuperSpeed)"I would like to clarify:Can the USB3DR peripheral be used as a USB 3.0 SuperSpeed port while simultaneously supporting USB 2.0 High-Speed operation on the same connector? Is the embedded USB 2.0 PHY always available when the USB3DR interface is enabled? When PCIe is not used, can the USB3DR interface provide both the 480 Mbit/s USB 2.0 and 5 Gbit/s USB 3.0 links together as a standard USB 3.x port? Is the PHY sharing limitation only between PCIe and USB 3.0 SuperSpeed, or does it also affect USB 2.0 functionality?Any clarification on the USB/PCIe PHY sharing architecture would be appreciated.

Hello, I’m trying to initially build the Distribution-Package 6.2.0 (v26.02.18) as stated in the Wiki (https://wiki.st.com/stm32mpu/wiki/STM32MPU_Distribution_Package#Initializing_the_OpenEmbedded_build_environment)I am using a VM in Virtual Box running Ubuntu 24.04.5 LTS.I attached the log file.Any help is appreciated :)Thanks in advance.Ben

Not able to log imu(ASM330LHH) data in the sdcard tried multiple times not detecting correct imu data is null only 

Hello, I am currently trying to set up the STM32H745ZIT6, and the datasheet wasn’t too clear about how to wire up the 3 VCAP pins. It stated to use 2x 2.2uF caps, but doesn’t state which pins. I found an old forum with many different configurations, typing all VCAP pins together, no VCAP pins tied togehter, and only two VCAP pins tied together. I just wanted some clarification on how I should be typing these pins.

 For diode part number ESDLIN1524BJ following information is needed:1) Housing/Encapsulation material (Example HENKEL GR-646)2) CTE (Co-efficient of thermal expansion) for Housing/Encapsulation material3) Lead Frame Material (Example Alloy42)4) CTE (Co-efficient of thermal expansion) for Lead Frame Material

I am facing an intermittent issue with the STM32N6570-DK when using it with macOS.Setup Board: STM32N6570-DK Host: MacBook Pro STM32CubeProgrammer: v2.23.0 Connection: USB-C hub with USB-A ports ( I am currently using the following USB hub: https://amzn.in/d/02O7R7zS) One USB-A port is connected to the STM32N6570-DK USB1 USB-C port Another USB-A port is connected to the STM32N6570-DK ST-LINK USB-C port Application: AI inference application using the onboard display and USB communication to stream data back to the host Initially, JP2 was configured on pins 1–2 (5V_STLK). IssueWhen using a direct USB-C-to-USB-C connection on Windows, I do not encounter this issue.However, on macOS, a direct USB-C-to-USB-C connection results in DEV_USB_COMM_ERR. Based on a suggestion from a related ST Community discussion (ST-LINK stuck in DEV_USB_COMM_ERR until USB replug after connecting with no target | Community),Also, we found out that a known issue/ limitation regarding this (USB

 I’ve been discovering the different views available in STM32Cube IDE and among them is the Build Analyzer view.In this view I found a section in the RAM called ._user_heap_stack.I searched for it in the linker script and found that it corresponds to the following section : /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */._user_heap_stack :{. = ALIGN(8);PROVIDE ( end = . );PROVIDE ( _end = . );. = . + _Min_Heap_Size;. = . + _Min_Stack_Size;. = ALIGN(8);} >RAMWith _Min_Heap_Size = 0x200; /* required amount of heap */_Min_Stack_Size = 0x400; /* required amount of stack */In Figure 1, one can see that the start address of the ._user_heap_stack is 0x2000 002C. This means that the last address of the stack should be 0x2000 002C + 200 + 400 = 0x2000 062C, with the 8 byte alignment that would make it 0x2000 0630. Figure 1 : Screenshot of the Build Analyzer ViewTo make sure my calculations are correct, I added a variable in the linker script (high