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Hello,I am using STM32H750ZB variant for an HMI custom project and I am using SDRAM via FMC.When I configure FMC in cubeide1.19.0, I can't see the FMC_NBL0 and FMC_NBL1.I can actually add these pins as GPIOs, but I can't define the AF as AF12_FMC.I know from the datasheet that this package supports it but I want your confirmation as I still don't have HW to test and don't want to change the package again and redo the HW.Thanks,Ayoub  

Question moved from the knoowledge base article: How to use STLINK-V3 MCO output on Nucleo boards as a precise clock source for STM32 Hello,  With this method, what level of accuracy (PPM) is expected ?   Thank you and have a good day.  

Hi Team, I am working with the STM32N6570-DK board and reviewing the available power measurement methodology. From what I understand, the current approach/documentation focuses on measuring only VDD_CORE power. My requirement is different: I want to measure the total MCU power using a JS220 Joulescope, not just the VDD_CORE domain. Specifically, I would like to understand: What is the recommended hardware measurement point on the STM32N6570-DK board to capture total MCU power? Is there a board jumper, shunt, or power rail that isolates the complete MCU supply path? If measuring only VDD_CORE is the officially supported method, what additional rails should be included to estimate total MCU power? Has ST validated any method for measuring full MCU consumption on this board, including CPU, NPU, internal memories, and essential MCU peripherals? Are there any precautions regarding ST-LINK, external memories, camera/display rails, or other board circuitry

Hi everyone, I am encountering a critical issue with the IWDG on an STM32U375 using STM32CubeMX v6.17.0 and a Segger J-Link Base. The scenario: I am testing the Watchdog behavior across Standby cycles. I have configured the Option Bytes via software to freeze the watchdog during low power modes: IWDG_SW: 1 (Software mode) IWDG_STOP_FREEZE: 0 (Counter stops in Stop mode) IWDG_STDBY_FREEZE: 0 (Counter stops in Standby mode) The Issue: When the system is in IWDG_STDBY_FREEZE mode, the following happens: The MCU wakes up from Standby correctly. I enter a test while(1) loop without refreshing the IWDG. At the exact moment the IWDG timeout should occur (10s), the MCU enters an unrecoverable state. No System Reset occurs. No HardFault_Handler is triggered. The CPU seems to be completely locked (Bus Lockup?). I tried to enable the IWDG Early Wakeup Interrupt (EWI) via NVIC, but HAL_IWDG_EarlyWakeupCallback() is never called before the crash. Contrast with RUN mode: If

Hello everyone,here are my questions:1. Is there any roadmap or community effort to add NeoChrom/GPU2D support to Zephyr?2. Has anyone successfully integrated the STM32 HAL GPU2D driver alongside Zephyr?3. Would it be possible to:- Initialize GPU2D using HAL in the Zephyr application- Patch Zephyr's LVGL Kconfig to expose Nema GFX options- Use LVGL's existing lv_draw_nema_gfx_stm32_hal.c backend4. Are there any technical blockers (interrupt conflicts, clock management, memory mapping) that would prevent this hybrid approach?I'm willing to contribute if there's guidance on the proper implementation approach.Thank you for any insights.

Hello, all my tools are updated to last ones, and software packages too. I start an empty project using X Cube FreeRtos 1.5 (just a default task). Play the soft with debug, and after a few seconds, press "Suspend" button to break the running program. Then, there are a lot of calls to vPortSetupTimerInterrupt function (port.c) in the call stack. The tick is by default 1ms and cpu clock to 250Mhz.  Not sure that is normal? thanks for your help Laurent    

Hi,I do not plan to use USB or CSI, and the board only receives 1.8V power. So, I asked how to connect the VDD33USB pin, and I was told to just connect it to GND. However, I have two more questions.I currently have the VDDA18USB and VDDA18CSI pins connected to 1.8V. Is it okay to leave them as they are, or would it be better to connect them to GND? (have to consider leakage in the Stop mode)Also, should I connect VDDCSI to GND as well?Thanks in advance.

Hi, will ST extend I-CUBE-LRWAN support to include the new MuRata LBAA0QB1SJ-TEMP-EVK? Or offer a ST board based on LBAA0QB1SJ-295? Any suggestion on how to reconfigure the current I-CUBE-LRWAN version to work on the new EVK? We were previously using B-L072Z-LRWAN1. 

Dear all,We have a design where the VCCQ of eMMC is currently 3.3V. We need to move to 1.8V to be able to use a new referenceIs there any risk to break somthing if I use the below DTS on board where eMMC is 3.3V VCCQ. We have pull up to VCCQ on D0 and CMDvqmmc-supply = <&v1v8>; mmc-ddr-1_8v;According to my tests, system is up and running, but I fear this should have an impact on MPU padsIf no risk, this could avoid me to add a DTS overlay according to my hardware board version in case of 3.3V VCCQI add my layout for eMMC for better understanding, see R353 and R356 to switch VCCQThanks in advance for answers and hintsRegardsLaurent  

Hi Team  I am trying to do UART bootloader, using cli command. The MCU used is STM32F446RET6 and dev kit used is nucleo-f446re.I am using USART1, for printf and cli command with interrupt. CLI command is used to enter system memory /bootloader but as shared above the programmer is not giving timeout error.   void jump_to_bootloader(void) { void (*SysMemBootJump)(void);   //system address defined volatile uint32_t addr = 0x1FFF0000;   // //introduce delay before switcing to bootloader after printf. // HAL_Delay(200);   //disable all interrupt request and stop SysTick __disable_irq(); // SysTick->CTRL = 0; // SysTick->VAL = 0; // // __HAL_RCC_SYSCFG_CLK_ENABLE(); // SYSCFG->MEMRMP = 0x01; //Deinit HAL and all peripheral   // HAL_UART_DeInit(&huart1);   //reset uart pins and gpio // __HAL_RCC_USART1_FORCE_RESET(); // __HAL_RCC_USART1_RELEASE_RESET(); // HAL_GPIO_DeInit(GPIOA,GPIO_PIN_9 | GPIO_PIN_10); HAL_RCC_DeInit(); HAL_DeInit(); // D

Hello,I am trying to use the newest cmsis dsp library (v1.15) to implement a vector matrix implementation. I am running into a "first defined here error" when trying to build with the cmsis dsp library (v1.15). I created an empty project just to try out building a project with the library included. I am running into the same issue there.I am using STM32CubeIDE version 1.13.1 and an STM32H750 with an M7.If I understand correctly, CMSIS v 1.15 does not have a "lib" folder anymore like the older versions and only the Include, PrivateInclude and Source folders must be integrated. Therefore the instructions in Configuring DSP libraries on STM32CubeIDE - STMicroelectronics Community are not helpful to me.Here you can see the folders I included. Am I missing something? How can I use the newest CMSIS library? I couldn't find any helpful documentation on the internet.Thank you,Leonard

I'm using a STM32F407VG (actually a disc-1 board). I've set I2S2 in full-duplex master mode and generating the MCLK out on PC6 for an external slave codec. So far so good.Now i want to set SDIO interface in full-duplex 4-bits mode but CubeMX throws a warning about a partial conflict with I2S master clock out. Frankly i have no clue about it, can i safely ignore the warning? 

Hello, I am encountering a specific issue with the system bootloader (I2C interface) regarding the Get CRC command. When sending the Get CRC command sequence via the system bootloader, the STM32U575 ACKs all bytes (Command, Address+XOR, Length+XOR), but the returned CRC value is consistently 0x0000 regardless of the binary file loaded in it. When running HAL_Calculate_CRC() within the user application on the same STM32U575 units, we receive valid, non-zero CRC data. I have tested and confirmed this issue across 2x STM32U575 units using both the stm32flash open source tool and manual scripting via an Aardvark I2C host. To isolate the issue, we tested the exact same scripts and stm32flash commands on STM32G0 and STM32G4 targets and they worked perfectly, returning valid non-zero CRCs when both in application and bootloader mode. Any insight into why the U5 is returning zeros while its predecessors work fine would be greatly appreciated. stm32flash output in the G0: ./stm32

Hello, I've been trying to setup bi-directional communication with USB-HID on a custom board with STM32WB55CEU. I can send data to the PC from the STM just fine. My usb stack runs, enumerates and reports correctly. However, when trying to send Data from the PC back to the STM, I always receive garbage packages. Here's my device descriptor for the Outreport: 0x09, 0x03, // USAGE (Vendor Usage 3) 0x75, 0x08, // REPORT_SIZE (8) 0x95, 0x04, // REPORT_COUNT (4) 0x91, 0x02, // OUTPUT (Data,Var,Abs)So 4 Bytes. I also tried this with and without adding a Report ID, which did not change the results whatsoever.I have also tried running the code with defining USB_CUSTOMHID_REPORT_BUFFER_EVENT_ENABLED; both in main.h and in usbd_customhid.c and usbd_customhid.h to no changes.I also tried changing CUSTOM_HID_EPOUT_SIZE to 0x04 and 0x05, same with USBD_CUSTOMHID_OUTREPORT_BUF_SIZE. Including all of the combinations with and without report ID and with and without enabling the buffer define.

To sum up my project, i get temperature value from NTC. I made ADC reading. There is no problem about getting values. I define temperature value as floating point variable. When observing it on debug screen, because it was floating, numbers after . is too much like seven digit. As you see in picture, is there any way to reduce the number of digits on debug window? temperatureDisplay 

It is well-known that when configuring and starting a timer using HAL_TIM_Base_Init and HAL_TIM_Base_Start_IT, the interrupt and callback are triggered immediately. This is because configuring the reload-register & prescaler requires generating an update event (using EGR_UG) which then sets the interrupt flag.The function TIM_Base_SetConfig even contains an attempt to solve this by manually clearing the UIF flag./* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); }However, this does not usually work, probably because the timer runs a little slower than the CPU, and the APB bus also needs a few cycles to transfer the access to EGR. Compiling without optimizatio

Hi,I’m currently working with the Nucleo L476RG board and the ST25R501 NFC reader, and I am using a provided .bin file (STEVAL_STM32L4x6-ST25R500_v1_0_4.bin) that runs on the board together with the GUI application.I would like to ask if it’s possible to obtain the source code corresponding to this .bin file. Having access to the source would help me better understand the implementation and allow me to adapt or extend it for my project.Any guidance on how I could get access to the source code would be greatly appreciated.Thank you!

Hello, Based on my understanding, in this code /* Run inference by executing epoch blocks until done */ LL_ATON_RT_RetValues_t result; uint32_t total_run_ticks = 0u; uint32_t total_wfe_ticks = 0u; do { uint32_t run_start = tim2_get_count(); result = LL_ATON_RT_RunEpochBlock(&NN_Instance_audio_network); uint32_t run_end = tim2_get_count(); total_run_ticks += (uint32_t)(run_end - run_start); if (result == LL_ATON_RT_WFE) { uint32_t wfe_start = tim2_get_count(); LL_ATON_OSAL_WFE(); uint32_t wfe_end = tim2_get_count(); total_wfe_ticks += (uint32_t)(wfe_end - wfe_start); } } while (result != LL_ATON_RT_DONE); uint32_t npu_end = tim2_get_count(); uint32_t total_us = tim2_ticks_to_us((uint32_t)(npu_end - npu_start)); uint32_t run_us = tim2_ticks_to_us(total_run_ticks); uint32_t wfe_us = tim2_ticks_to_us(total_wfe_ticks); LOGI_I32("NPU inference (us): ", (unsigned long)total_us); LOGI("NPU epoch time (us): run=%u wfe=%u", run_us, wfe_us); calling LL_ATON_OSAL_WFE

Hi!I have a STM32MP257F processor. The clock for SDMMC1 is constant at 3.3V. Therefore the U-boot cannot read the SD-card.My question is: What clock need to be active/chosed in the device tree so it u-boot can read the SD-card sdmmc1? Hit any key to stop autoboot: 0 Boot over mmc0! Saving Environment to MMC... stm32_sdmmc2 mmc@48220000: stm32_sdmmc2_getcd called stm32_sdmmc2 mmc@48220000: bus_with = 1, clock = 0 stm32mp25_reset clock-controller@44200000: reset id=69 offset=0x830 bit=0 status=1 stm32mp25_reset clock-controller@44200000: reset id=69 offset=0x830 bit=0 status=0 D/TC:? 0 tee_ta_init_session_with_context:562 Re-open trusted service a8cfe406-d4f5-4a2e-9f8d-a25dc754c099 F/TC:? 0 pta_scmi_invoke_command:404 SCMI command 0x3 ptypes 0x3 F/TC:? 0 pta_scmi_invoke_command:404 SCMI command 0x4 ptypes 0x651 F/TC:? 0 regulator_disable:142 v3v3 D/TC:? 0 tee_ta_close_session:465 csess 0x8212f890 id 1 D/TC:? 0 tee_ta_close_session:484 Destroy session D/TC:? 0 tee_ta_init_session_wi

Hello, I am currently working with the STM32G030C8TX microcontroller and I have encountered an issue while reading analog values through the ADC. When I attempt to read ADC values from the PB11 and PB12 pins, the measured values are incorrect or unstable. However, when I use other ADC-capable pins on the same microcontroller, the readings appear to be correct and stable. Because of this behavior, I am unsure whether: PB11 and PB12 pins support ADC functionality on this device/package There is a configuration issue on my side Or there might be a silicon/production-related issue with the chip I would appreciate it if you could clarify whether these pins are valid ADC inputs on the STM32G030C8TX and if there are any known limitations or special configurations required.

[PN]: STSPIN32G4[VERSION]: v6.4.1[TOOL]: MC Workbench / Motor Pilot[DETAILS]:I am working with a custom PCB design which was largely follows the EVSPIN32G4 schematic. I defined a custom board in MC Workbench and generated firmware, and can upload the firmware to the STSPIN without issue. Motor Pilot detects the board, and I can command START/STOP and read values/status.When I press START for either Torque or Speed control, the board enters some ALIGNMENT stage (only the first time) followed by RUN. No behavior is observed with the motor. No faults are ever reported by Motor Pilot. I can STOP and START motor control again and still see no change in behavior.With a scope, after START I see a single pulse on the U phase's gate for around 22 microseconds, then it falls to 0V and remains there. I did briefly run the firmware under GDB, and I see that MOE is set during RUN.Using a 48V frameless motor, running from a Li-Ion pack (bus voltage currently 56V), SIR680LDP-T1-RE3 FETs. VCC mea

I have an application that uses the OCTOSPI1 interface to read from and write to an external NOR flash memory into an SRAM1 buffer. The read and write operations are performed in the NS section of the application. If I perform a transfer without using DMA, it works. However, if I try to use GPDMA1, I get a buffer with all data set to 0, with no error.Additional information: the application works very well with GPDMA1 if I disable the MCU’s TrustZone mode.I conclude that GPDMA is not fully initialized to work with TrustZone enabled, but I can’t figure out what’s missing despite my searches on this forum.Any help would be greatly appreciated.

I created a motion_fx for stm32h562 from CubeMx. The auto generated motion_fx.h file does call (line 135)size_t MotionFX_GetStateSize(void);​But the code does miss the include #include <stddef.h>Which results in the following error:unknown type name 'size_t' motion_fx.h ./Middlewares/ST/STM32_MotionFX_Library/Inc line 135 C/C++ Problem 

I'm confused by ST's seeming definition of what they think a QUAD word is....according to most of the planet a WORD is 16-bits, so a QUAD word is 64-Bits.  However according to ST a quad word is 128 bits on the STM32U535.I enclose a section of my code - essentially I want to write 11520 values which are U32's and then read them again when I power it back up, bit its getting confused because I can't get my head around whether there's 64, or 128 bits in a QUAD WORD! xnLookup[][][] is the Parameter I want to write, and the read back which is a U32This is the WRITE: i=0;//Channel 0..3 j=0;//Temperature 0..180 (-50 to +130DegC) k=0;//Term X0, X1, X2, X3 etc n=1;//Counter for every 4th flash word MemCount=0;//Total memory locations //was 11520 for -50 to +130DegC. change to for(m=0;m<11520;m++)//Total number of parameters to write - //12160 { //Copy the polynomial term into the flash array flashdata32[n-1].l=xnlookup[k][i][j].l;//Put the polynomial term onto the fla

I am using an STM32 Nucleo-F767ZI with RMII Ethernet + LAN8742A PHY and an example project based on lwIP/TCP-IP. I noticed a strange behavior: if I comment out MX_USB_OTG_FS_PCD_Init(), Ethernet communication stops working. If I keep it enabled, Ethernet works correctly. The peripheral initialization order is: MX_GPIO_Init(); MX_USART3_UART_Init(); MX_LWIP_Init(); MX_TIM3_Init(); MX_SPI4_Init(); MX_CAN1_Init(); MX_UART5_Init(); MX_USB_OTG_FS_PCD_Init(); Additional observations: SystemClock_Config() does not change Replacing MX_USB_OTG_FS_PCD_Init() with HAL_Delay() does not fix it So it does not look like a timing issue It seems that HAL_PCD_Init() / HAL_PCD_MspInit() for USB is enabling or configuring something indirectly that Ethernet depends on My question is: What could USB FS initialization be configuring that would make Ethernet work, even though they should be unrelated? I am thinking about possibilities such as: GPIO clocks being enabled indirectly MSP/NVIC config