If BLB2=1, hardware maps the System memory to address 0. The bootloader might've remapped it when it detects "valid code" in either bank, but it apparently does not do it, as witnessed by footnote to SYSCFG_MEMRMP.MEM_MODE description:
1.When BFB2 bit is set, the system memory remains aliased at @0x0000 0000
IMO, this should be added - maybe also as a footnote - to Table 5. Boot modes.
The reason is, that the combination of default VTOR=0 and System memory mapped at 0 causes the users to complain of "my code crashes at 0x1fffxxxx", which we see here quite often.
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SYSCFG_MEMRMP.MEM_MODE description is common for all three Cat devices; however, the BFB2 bit is present only in Cat.3 devices according to in which Flash chapter is it present at all. Shouldn't this fact be reflected in the abovementioned footnote?
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Only Cat.3 devices are documented to have BFB2 in option bytes. However, factory-progrmmed value for Cat.2 and Cat.4 devices have the bit at this position set to 0, which is surprising (as the default values for reserved option bits are systematically 1, the erased FLASH bit state). Does this have any pertinence to the above comment? Can please the fact that this bit has to be 0 at all times be highlighted in the Cat.2 and Cat.4 option bytes description?
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Also, RM0440 for the Cat.3 'G4 says:
Supports dual boot mode thanks to the BFB2 option bit (only in dual bank mode)
(emphasis mine). So, for the process you've described to work, is it necessary to program also to have DBANK=1, or will it work also when BFB=1 and DBANK=0?
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It would be also nice, if AN2606 would be clear about what does "valid code" (and "Flash memory empty" in case of Patterns 6, 11, 13) exactly mean. I know the information is out there, if one searches well, but it would be nice to see it at the description of the Patterns, maybe as a footnote; or alternatively in the individual devices' chapters.
JW
