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IIS2DH interrupt generation and tech details

Marco Pappalardo
Associate II
Posted on November 04, 2016 at 15:57

Hi,

I would like to use IIS2DH accelerometer as main accelerometer in a custom board for my project. For this reason I've bought the STEVAL-MK1168V1 to make some tests. I would like to ask you some questions about this product, since they are not well specified in the datasheet I've downloaded from the product page site.

1) I usually program with Atmel microcontrollers, so I've made the same this time. What I've done is to link both i2c pins, Vdd and Vdd_io to Vcc=3v3, GND and both INT1 and INT2 pins. i2c communication works fine but i can't handle interrupts generated through INT pins.

I set the Int1_cfg register to binary 00111111 (OR combination of all axis events), the I1_A01 bit on ctrl_reg3 to 1 and, after moving the board, I cheked the int1_src register I've seen that IA, ZH, YH, XH bits are set, so what I've expected was an interrupt on INT1 pin, but the corresponding callback on microcontroller doesn't start. The callback seems to start only if I latch him, setting to 1 the LIR_INT1 on ctrl_reg5, just after reading the int1_src register. The port on microcontroller side is configured as input with pull-down and with rising edge detection, the code works for other uses so I am sure there are no errors on my code. What I ask you is:

- Why I have this behaviour? It is correct or I have to set differently the microcontroller port?

- Can you tell me more about the interrupt generated on INT pins? Which is the waveform used, is it a spike? Which is the duration of the signal?

2) Reading the datasheet I have not understood well which is the meaning of int1_cfg and int1_src registers. If I use the same setting as written before for int1_cfg I have a strange behaviour on int1_src register: it gives me always the value 6A even when I have only negative value read from the output registers. Now, can you tell me more about the AOI-6D setting related to the difference in ZHIE/ZLIE and ZUPE/ZDOWNE? Cause it's not clearly explained on datasheet. I think that the couple ZUPE/ZDOWNE is related to 6-direction movement/position recognition (as expected by the name, I think that if I set the ZUPE the corresponding ZH interrupt will be generated if I move to positive direction in Z axis), but I don't know how to interpret the other couple ZHIE/ZLIE, since what I wrote above (ZH set when reading negative acceleration value on Z axis). 

Perhaps it is related to the OUT_Z_H and OUT_Z_L registers, so ZH would be fired if the OUT_Z_H register is filled? Or to what the ''interrupt generation on Z high event'' is related?

Moreover which is the meaning of INT1_THS register? Is it used to generate interrupt when a value on every axis enabled in the int1_cfg register overtake the threshold value set, or it is used also to determine the 6-D position/movement recognition?

3) In the datasheet it is written that both INTx_cfg registers are loaded on boot and a write operation is possible only after system boot. What does it mean? Maybe should I set up both this registers correctly is writing on them before any other operation so do I need a sort of external mechanism to reboot the accelerometer every time I need to change the setting of these registers?

4) Can you explain me better what does it mean ''reboot memory content'' function enabled by setting the BOOT bit on ctrl_reg5?

5) Can you tell me more about the high-pass filter mode configuration HPM[1:0] bits? Which are the differences between them and how I have to interpret the REFERENCE/DATA CAPTURE register in relation to them?

Thank you very much.

Marco

#interrupt #iis2dh #mem-reboot
1 ACCEPTED SOLUTION

Accepted Solutions
Miroslav BATEK
ST Employee
Posted on November 11, 2016 at 12:24

1) Your setting of INT1_CFG register to (0011 1111b) doesn’t make sense. Basically you want trigger the interrupt if the acceleration value is lower or higher than threshold in any axis, this is always true. If the interrupt is not latched, the value is valid for one period of your ODR settings. If it is latched the value is set until you read the INT1_SRC register.

2) If you set AOI, 6D = 00. The OR condition is used between the other bits settings.

If you set AOI, 6D = 10. The AND condition is used between the other bits settings.

If you want use 6D detection you can set AOI, 6D bits 01 or 11. Other bits in the INT1_CFG register are ignored.

Maybe an example will help:

INT1_CFG = 00101010b … if acceleration value in X axis OR in Y axis OR in Z axis will be higher than INT1_THS for time defined in INT1_DURATION register the interrupt will be triggered.

INT1_CFG = 10010101b … if acceleration value in X axis AND in Y axis AND in Z axis will be lower than INT1_THS for time defined in INT1_DURATION register the interrupt will be triggered.

3)

 

You don’t have to worry about this sentence. You don’t have to reboot the accelerometer. It is just saying you can’t configure these register during the start-up of the accelerometer. I suppose there is already small delay after power-up so this is not an issue.

4) By execution “Reboot memory content� command default values from internal non-volatile memory are loaded to working registers. By this you can reset the register settings to default values.

5) For High pass filter setting please refer to AN3308 for LIS3DH. The settings is very similar to IIS2DH.

Best regards

Miroslav

View solution in original post

5 REPLIES 5
Miroslav BATEK
ST Employee
Posted on November 11, 2016 at 12:24

1) Your setting of INT1_CFG register to (0011 1111b) doesn’t make sense. Basically you want trigger the interrupt if the acceleration value is lower or higher than threshold in any axis, this is always true. If the interrupt is not latched, the value is valid for one period of your ODR settings. If it is latched the value is set until you read the INT1_SRC register.

2) If you set AOI, 6D = 00. The OR condition is used between the other bits settings.

If you set AOI, 6D = 10. The AND condition is used between the other bits settings.

If you want use 6D detection you can set AOI, 6D bits 01 or 11. Other bits in the INT1_CFG register are ignored.

Maybe an example will help:

INT1_CFG = 00101010b … if acceleration value in X axis OR in Y axis OR in Z axis will be higher than INT1_THS for time defined in INT1_DURATION register the interrupt will be triggered.

INT1_CFG = 10010101b … if acceleration value in X axis AND in Y axis AND in Z axis will be lower than INT1_THS for time defined in INT1_DURATION register the interrupt will be triggered.

3)

 

You don’t have to worry about this sentence. You don’t have to reboot the accelerometer. It is just saying you can’t configure these register during the start-up of the accelerometer. I suppose there is already small delay after power-up so this is not an issue.

4) By execution “Reboot memory content� command default values from internal non-volatile memory are loaded to working registers. By this you can reset the register settings to default values.

5) For High pass filter setting please refer to AN3308 for LIS3DH. The settings is very similar to IIS2DH.

Best regards

Miroslav

Marco Pappalardo
Associate II
Posted on November 14, 2016 at 09:28

Thanks A LOT!

You solved all my doubts.

I really appreciate your example, really really helpful.

Best regards,

Marco

christian B.
Associate II
Posted on November 29, 2016 at 08:44

Hello,

I could'nt find electrical characteristics of the INT1 and INT2 pin, are they Push Pull Pin ? what are the current source/sink capabilities ? Is the active level 1 ?

Miroslav BATEK
ST Employee
Posted on November 30, 2016 at 16:26

The interrupt pins are push-pull outputs. The active level can be set by H_LACTIVE bit in CTRL_REG6 (0x25h).

I will try to get the sink/source current capabilities and will come back to your question.

Best regards

Miroslav

Posted on December 16, 2016 at 14:52

Here are 

sink/source current capabilities of interrupt pins:

max. source current: 1mA @1.7V; 48mA @2.5V; 101mA @3.6V

max. sink current: 22mA @1.7V; 54mA @2.5V; 103mA @3.6V