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Wiring from st link to the stm32g061Error message It does not connect to STM32CubeProgrammer with the stm32G061 it keeps saying Error: unable to get core IDError: No STM32 target found! If your product embeds Debug Authentication, please perform a discovery using Debug Authentication. I have NRST pulled high with a 10k ohm resistor and then a tactile button which will make it go low when pressed.  The pinout for the STM32G061 is the same as the STM32G050 and when I have the same wiring as I did with the STM32G050 on this st link v2, but with the stm32G050 it connected correctly in STM32CubeProgrammer.  Why doesn’t it work with the STM32G061?

Our board contains a STM32H523 and a W25Q256JV connected to OctoSPI1 configured for Quad SPI mode. FileX/LevelX should handle the external memory.LevelX OSPI Component is configured for “Custom”. After generating the code with CubeMX (6.18.1), Filex/Target/lx_stm32_ospi_driver_glue.c contains several functions with wrong code, e.g: INT lx_stm32_ospi_get_status(UINT instance) {…/* Initialize the read status register command */s_command.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;s_command.IOSelect = HAL_XSPI_SELECT_IO_7_0;s_command.Instruction = LX_STM32_OSPI_OCTAL_READ_STATUS_REG_CMD;s_command.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;s_command.InstructionWidth = HAL_XSPI_INSTRUCTION_16_BITS;s_command.Address = 0;s_command.AddressMode = HAL_XSPI_ADDRESS_8_LINES;s_command.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;s_command.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;s_command.DataMode = HAL_XSPI_DATA_8_LINES;s_command.DataLength = 2;s_command.DummyCycles = LX_STM32_OSPI_DUMMY_CYCLES_

Hi listI am testing the STM32MP135d-odyssey for a project. It is small, still cheap, has support for POE and on board ethernet connectors and SD-card holder. The buildroot repositories are quite old so I wonder if the board is in actual use and can be recommended for new projects?The xogium repository seems very outdated but I have cherry picked a few patches from there to a fork of STMicroelectronics repository and it builds and boots with modern buildroot. I have only tested to boot from sd-card yet.Please test if interested. I have updated versions of buildroot-stm32mp135d-odyssey, u-boot and optee_os in my Github repository.https://github.com/GauiStori/buildroot-stm32mp135d-odysseyShall I make pull requests for u-boot and optee_os to STMicroelectronics or xogium? Or is there an updated version of xogium somewhere?Now I want to see if I can find a working Yocto recipe. RegardsGudjon 

Page 31 of AN5093, AN2687 is mentioned while discussing crystals. AN2687 is about a LCD software driver. I believe they meant to mention AN2867 which is also mentioned earlier in the document.   

Hello,I have a STM32U585. I’m trying to use SAI to transmit and receive I2S audio as a slave. The I2S master is an external codec that’s configured for stereo 16bit 16kHz audio. Mic/input from codec->MCU and speaker/output from MCU->codec. The first stereo sample received on the codec is routed to the left speaker and second to the right. This works as expected for the mic. For the speakers, sometimes even samples will play on the right side and odd on the left. I’ve loaded the DMA buffer with dummy values 0xAAAA and 0x0000 to demonstrate. MISO is the signal of interest here. I’d like 0xAAAA to be on Ch 1 consistently.Expected SamplesUnexpected SamplesThis occurred about 50% of the time. It’s observable for the entire runtime and doesn’t correlate with how long the software has been running. I suspected a sync issue SAI/DMA so I implemented a quick hack to poll the GPIO to start the DMA transfer after the falling edge of WS to help sync. This improves reliability from 50% to 90%.

Hello,I want to implement HOGP (BLE HID) on an STM32WBA23KE so that it can connect to Windows 11.I implemented it using the BLE_HID_Mouse sample for STM32WBA55G-DK1 as a reference, but Windows 11 does not recognize it as an HID device (it seems to be failing in some procedure after the Bluetooth connection). I checked the GATT service configuration by connecting with a smartphone app, and there seem to be no particular problems (although I cannot read the Report Map or HID Information due to BLUETOOTH_PRIVILEGED).With the STM32WBA55G-DK1, I have confirmed that it can connect to Windows 11 as an HID device and behaves like a mouse.I have attached the main source files and .ioc file of the STM32WBA23KE project.Are there any possible causes?Best regards, Gotoda 

Cubemx2 only allots enough buffer descriptor table space for 4 endpoints. When a 5th endpoint is added, the table will overlap with the data buffer. In the following generated code, address should be starting at 0x28 and not 0x20. HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x0, HAL_PCD_SNG_BUF, 0x20); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x80, HAL_PCD_SNG_BUF, 0x60); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x81, HAL_PCD_SNG_BUF, 0xA0); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x82, HAL_PCD_SNG_BUF, 0xE0); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x3, HAL_PCD_SNG_BUF, 0x120); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x83, HAL_PCD_SNG_BUF, 0x160); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x4, HAL_PCD_SNG_BUF, 0x1A0); 

We are using STM32G0B1CEU6N to implement two PD sink ports. USB is not used. We also need IOs with 1.8V and 3.3V levels. Device datasheet states in Table 81 that UCPD requires VDD to be 3.0-3.6V in sink applications. All UCPD CC pins are in VDDIO2 bank. Does UCPD require VDD to be 3.0V or is it really powered from VDDIO2? What voltage level is required on VDDIO2 to support UCPD CC pins?

Windows 11 version 22H2 (OS Build 22621.6060)Visual Studio Code v1.141.0STM32CubeIDE for Visual Studio Code V3.11.0STM32CubeMX v6.18.1STMCUFinder v6.0.0I have configured the executable path below via File > Preferences > Settings below: Already created settings.json below, {  "stm32cube-ide-core.configuration.productSTM32CubeMX.executablePath": "C:/STMicroelectronics/STM32CubeMX/STM32CubeMX.exe",  "stm32cube-ide-core.configuration.productFinder.executablePath": "C:/Program Files/STMicroelectronics/STMCUFinder/STMCUFinder.exe"}When click on “Launch STM32CubeMX”, nothing shown up.However, I can run the STM32CubeMX externally from Windows​​​ (not from VSCode).Later, I found the solution that CAN Launch STM32CubeMX, that is previously I have set the STM32CubeMX.exe to run as Administrator, so:- remove the administrator elevation from STM32CubeMX.exe- remove the settings.jsonThen clicking the “Launch STM32CubeMX”, the STM32CubeMX is running fine already the same time you are able to l

Hello,I am looking for a camera module for the NUCLEO-H7S3L8 board, using the STM32H7S3L8 MCU.My project requirements are: Field of view: at least 120° horizontal FOV Preferably RGB or YCbCr output I would prefer a module that is reasonably easy to connect, with a breakout board or pin header I would like to avoid MIPI CSI-2 cameras because the NUCLEO-H7S3L8 does not have a CSI-2 camera receiver or a 22-pin camera connector The STM32H7S3L8 datasheet, Section 3.26, states that its DCMIPP supports an 8- to 16-bit parallel camera interface, including RGB565, YCbCr 4:2:2 and compressed data such as JPEG. However, the NUCLEO-H7S3L8 board does not appear to have a dedicated camera FPC connector.I found an ST Community table listing OV2640, OV5640 and OV5642 as examples of sensors supported by STM32 DCMI. I am therefore considering an OV5640 module with a 120° lens, such as this module:https://www.eleparts.co.kr/goods/view?no=6210776&utm_ I also considered an Arducam Mega SPI camera

Hello,I am working with an STM32N657 on the NUCLEO-N657X0-Q and I am trying to use the Ethernet PTP PPS signal as a hardware start trigger for TIM3.TIM3 is configured as follows: HAL_TIMEx_TISelection(&htim3, TIM_TIM3_TI1_ETH1_PPS, TIM_CHANNEL_1);sSlaveConfig.SlaveMode = TIM_SLAVEMODE_TRIGGER;sSlaveConfig.InputTrigger = TIM_TS_TI1FP1;sSlaveConfig.TriggerPolarity = TIM_TRIGGERPOLARITY_RISING;sSlaveConfig.TriggerPrescaler = TIM_TRIGGERPRESCALER_DIV1;sSlaveConfig.TriggerFilter = 0;HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig);TIM3 itself uses an external clock on ETR2 and should only be enabled by the rising edge of ETH1_PPS.The internal connection works correctly when I use the normal/fixed PPS mode.For example: ETH1->MACPPSCR = 1U;In this case the PPS rising edge reaches TIM3, TIM3->CR1.CEN becomes set, TIM3 starts counting and the rest of my application starts correctly.However, I cannot get the same internal connection to

Hello,on a shared SPI bus (one master, several slaves, one NSS line per slave, the "Standard multislave communication" topology of RM0456 §68.4.5), an STM32U5 SPI slave with hardware NSS sometimes ends a transaction early. EOT is raised 112 or 126 bytes (frames) before TSIZE, with no UDR, OVR, MODF or FRE flag. The slave then stops driving MISO, so the master receives the last ~110 bytes as 0x00, while on the slave the HAL reports a normal "transfer complete". The data corruption is silent.When it happensEach slave prepares its next transfer on its own, with HAL_SPI_TransmitReceive_DMA, which sets SPE as its last step, and then raises a "ready" GPIO for the master. So the call sometimes falls while the master is clocking another slave: this slave's NSS is high and SCK is toggling. That is the only case in which the failure appears.With only one slave active (no foreign traffic on SCK) it never happens. It is the instant SPE is set that matters, not the DMA setup. Our workaround: prepar

When using I2C peripherals with an STM32, occasional NACKs or communication timeouts can be difficult to diagnose.How do you usually approach debugging these issues? Do you start by checking the bus signals with a logic analyser, reviewing the timing configuration, or inspecting the firmware error handling?I'd be interested in hearing which debugging techniques have been most useful in practice.

  I am integrating the STSAFE-A110 as a secure element with the STM32H523 as the host MCU. I am using the latest version of the X-CUBE-STSE01 middleware and want to establish and use a secure channel between the secure element and the host. Using the Host Key Provisioning example provided in X-CUBE-STSE01, I provisioned the Host MAC and Host Cipher keys into the secure element. I want to store 12 bytes of data in data partition index 2 during provisioning and read the data back during runtime in the host environment. Currently, I can successfully store and read the data using the following APIs with STSE_NO_PROT:             stse_data_storage_update_data_zone()            stse_data_storage_read_data_zone() However, I want to perform these operations using STSE_HOST_C_MAC_R_MAC, as this is the Host Session protection mode supported by X-CUBE-STSE01. On one board, I receive the STSE_INVALID_C_MAC error. I provisioned the keys on another board, but on that board, I receive the STS

Hello ST team,I am using MCSDK 6.4.1 with a custom STM32G431CBUx inverter board. My external ESC PWM signal is physically connected to PB10.As shown in the two attached images:1. Motor Control Workbench shows PWM_ESC_INPUT on PB10 / TIM2_CH3.2. After code generation, STM32CubeMX shows M1_PWM_INPUT on PA15, while PB10 is unconfigured.Why does the generated configuration differ from the Workbench setting? Is this a known limitation or a configuration issue?How can I use PB10 / TIM2_CH3 with the native MCSDK ESC functionality?Thank you.  

Hello,Our STM32N657 appears to be revision B. We use a battery-powered board with an STM6601 power-button controller. The MCU asserts PSHOLD early in the FSBL to keep power enabled.ES0620, section 2.2.18 specifies setting SYSCFG_CM55RSTCR.CORE_RESET_TYPE, followed by a software reset (NVIC_SystemReset()), after the first power-on reset.That additional reset conflicts with our power-hold arrangement.Is the initial software reset strictly required for the NRST workaround, or can we set CORE_RESET_TYPE and continue booting? If it is mandatory, is there a supported alternative that avoids this extra reset?Thanks!

Hi there!I’m having an issue when flashing / debugging with the STLINK-V3SET + ISO (V3J17M11B6S1). From VSCode I get the error Error: Unable to connect to the target device, Access port is not valid. This issue does not appear when using STLINK-V3MINI (V3J17M10).I updated STM32CubeProgrammer vscode bundle to 2.23.0 and then code upload / debug worked once and now I’m getting the Access port is not valid error again. I tried setting the “serverApID” in the launch.json to force the correct Access port however I can’t get this to work.Is this a known issue? I made a log for both debuggers:STLINK-V3MINI V3J17M10:STMicroelectronics ST-LINK GDB server. Version 7.13.0Copyright (c) 2026, STMicroelectronics. All rights reserved.Starting server with the following options: Persistent Mode : Disabled Logging Level : 1 Listen Port Number : 61234 Status Refresh Delay : 15s Verbose Mode : Disabled SWD Debug

Can the VNL5050N3-E operate reliably with a 3.3V Input logic signal while switching a load of maximum 2A?

Hello,I am designing a wall-mounted touchscreen panel using a VL53L1CB for wake-up and person/presence detection at approximately 2–3 metres. High absolute distance accuracy is not required, but detection must be reliable without frequent false triggers.The sensor will be mounted behind a single 0.70 mm cover glass. I have read AN5231 Rev. 2 and UM2133.The proposed optical construction is:Single-layer 0.70 mm cover glass Sensor mounted parallel to the glass Air gap kept at or below approximately 0.30 mm, if mechanically possible Full-height black gasket/light barrier between the Tx and Rx sides Separate clear apertures for Tx and Rx in the black printing/coating Target transmission above 87% at 940 nm and haze below 1% at 940 nm Crosstalk and offset calibration performed after final assemblyThe first production batch will consist of 15 mechanically identical units.I would appreciate clarification on the following points:AN5231 recommends a cover-glass thickness below 0.6 mm, an air gap

Hardware and software MCU: STM32F411CEU6 Board: WeAct Black Pill V3.0 IDE: STM32CubeIDE 2.2.0 Programming tool: STM32CubeProgrammer 2.21.0 Host OS: Windows 11 Application: Existing application built as an ELF and BIN file (approximately 69.11 KB) Current programming method: JTAG/SWD, which works correctly Board reference: https://stm32-base.org/boards/STM32F401CEU6-WeAct-Black-Pill-V3.0.html#Reset-buttonThe reference page describes the F401 version of the board; my board uses the STM32F411CEU6.ObjectiveI want to program a fixed application binary (.bin) directly using STM32CubeProgrammer over USB DFU or UART, using the STM32's factory-programmed system-memory bootloader.I am not developing a custom bootloader or implementing field firmware updates. The same application currently programs and runs correctly through JTAG/SWD.1. USB DFU behaviourI enter system-memory boot mode by holding BOOT0, pressing and releasing NRST, and then releasing BOOT0.Windows detects the device th

ProblemSTM32_Programmer_CLI.exe -c port=SWD sn=<sn> and -l stlink-only each take ~30 seconds (sometimes much more) under v2.23.0 when launched programmatically by another application (CreateProcess, stdio redirected to pipes, no console window) — the pattern any automated test/programming tool uses. CPU stays near-idle during the delay.Expected behaviorSame as v2.22.0 and same as running the CLI interactively on v2.23.0: under two seconds. Reinstalling v2.22.0, with no other change to our application, fixes it immediately.What doesn't explain itRuled out through direct testing: console presence, output redirection style, handle inheritance, antivirus, elevation, 32/64-bit calling process, working directory, concurrent vs. sequential calls, a full reboot, network reachability (disabled proxy auto-detect, firewall-blocked the exe, disabled WiFi entirely — none changed the timing), and the local Analytics\TrackedData.json cache (already empty).A Process Monitor trace of a slow call

Hello,I am evaluating cryptographic performance for a secure boot using a NUCLEO-H533RE board and the OEMiRoT example from STM32CubeH5.I compared two AES-128-CTR implementations:Software: mbedtls_aes_crypt_ctr(). Hardware-backed: bootutil_aes_ctr_encrypt() using SAES.The mean encryption times are:Input size Software SAES-backed implementation 32 bytes 10.55 µs 29.46 µs 256 bytes 76.70 µs 222.88 µs 1024 bytes 303.50 µs 886.02 µs  For an academic comparison, is it accurate to describe this result as “software AES-CTR versus SAES ECB with software CTR and driver protection overhead”? Thank you!

Hi!I'm trying to developing a Qt6 QML application with Vulkan support. But I having some issues. Can ST Dev Team give me an example of an Qt6 QML application that use Vulkan? It must work on STM32MP257. It will be a reference. I think I having wrong code settings on my Qt6 QML application. For OpenGL, it works. But not for Vulkan.Thank you!

Hello,Any idea how to get the price history for the part “STM32L053C8T6” ? (specifically on Sept06 th)I have a quotation conflict with my supplierThanksMiki

Hello,I am working on a requirement involving XIP (Execute-In-Place) from external QSPI flash on the STM32U5G9 and am encountering an issue executing the application from external flash.I have developed a working external flash loader for my QSPI memory and successfully programmed a simple GPIO toggle application into external flash.In the bootloader, I initialize the QSPI interface, configure the flash in memory-mapped mode, and then jump to the application located at 0xA0000000.Using the debugger, I can confirm that execution reaches the application's Reset_Handler at 0xA00002B4. However, when executing the very first assembly instruction, the processor enters HardFault_Handler at 0xA0000458.The fault status registers indicate: CFSR = 0x00000001 (Instruction Access Violation) HFSR = 0x40000000 (Forced HardFault) MPU is disabled VTOR = 0xA0000000 I have also verified that the application vector table contains valid stack-pointer and reset-handler addresses, and that the external