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Hi everyone,I have been testing this sensor for my application using ESP32 based board and I found that the readings/values of ambient and nb target do not co-relate or give any context to the values of reflect, signal, spad and sigma.Based on my data I found that#1 Sigma - is the most reliable feature to filter noise#2 SPAD - is the most reliable feature to see/spot highly reflective zones#3 Reflect/Signal - gives more reliable data (context) around the reflective spots - usually complementaryBut#4 Ambient - shows the reflective spots but not all the time and not complement other features, does it signify something else? more of environment? It does change based on the object color - white is high and black is low - indoors.#5 nb_target - what does it even show/mean/signify? this is the most ambiguous feature. There is a option to choose up to 4, does that mean 4 signal are sent per zone? and its filtered based on the best if I choose 1? Are all the data/values of other features selec

I configured usb cdc class with freertos using cubemx and generated the code and tried to run it and when i checked the windows device manager, i was unable to see the usb virtual com port, board i am using is stm32h735-g DK. The clock and pin configurations are all correct. please help me out, attached the ioc file in the forum. 

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.HI Request you to kindly share the RoHS certificate for FXLS8974CFR3 on priority, as it is required urgently.Appreciate your quick support on thisREgardsRaguraman J 

STM32N6: Black screen after HAL_NVIC_SystemReset() — FSBL not booting, works fine after NRST/power cycleGövde:Hello,I have a bootloader (FSBL) and a separate application on anSTM32N645L0, running from external XSPI NOR flash MX25UM25645GXDI00 in memory-mapped XIP mode (Octal DTR).Setup:FSBL configures the external flash into Octal DTR mode (volatile CR) at every boot and shows update/bootloader graphics on the display The application runs its own graphics To enter bootloader mode from the application, call HAL_NVIC_SystemReset()Problem:After HAL_NVIC_SystemReset(), the device stays on a black screen — the FSBL graphics never appear. However, if I reset via the NRST button or a full power cycle, everything boots normally.What I suspect:Since the N6 is flashless, BootROM must read the FSBL from external flash in standard SPI mode. My theory is that after a software reset the flash chip stays in Octal DTR mode (it doesn't lose power), so BootROM cannot read the FSBL at all.Questions:Is th

The MB1854B camera on the STM32MP257FDK fails to open; clicking the camera icon on the desktop results in a white screen. Is this related to hot-plugging the camera? How can this be resolved? dmesg -w log:stm32-csi 48020000.csi: Timeout waiting for VC0 stopstm32-csi 48020000.csi: Failed to stop stream:0

HiLooking at recent STM32Cube FW for H7 (1.13 after 1.11) or G0 (1.6.3 after 1.6.2), I found that line endings in the archives downloaded by CubeMX (e.g. stm32cube_fw_g0_v163.zip) in several files have been changed from CR/LF to LF.In principle, I welcome this change, but as it makes large parts of code appear “different” to existing code base (unless one already cared about correct handling and conversion in the past), shouldn’t there be some warning during code generation when overwriting large amounts of files that still have CR/LF?! Did I miss some announcement?Kolja

Hi, We are using the ASM330LHHTR in our design and would like clarification regarding the INT1 pin configuration. We intend to configure INT1 as an active-low interrupt with the output driver set to open-drain.However, the datasheet seems to indicate that active-low operation requires a push-pull configuration.Kindly let me know the details.Thanks

Hello,The self-test for the ISM330DHCX failed.What could be the cause?I performed the self-test following the procedure in application note AN5398.The test failed (NG) on the negative side of the Z-axis for the gyroscope function.When measuring the I2C waveforms, the data output by the IC at registers 26h and 27h showed values ​​consistent with a self-test failure.Incidentally, I am turning to this community because the distributor's support has been poor.Regards,  Japanese memoこんにちはISM330DHCXのセルフテストに失敗した。原因は何が考えられるか？アプリケーションノートAN5398の手順に沿ってセルフテストを行った。ジャイロセンサ機能のZ軸のネガティブでNGが出た。I2C波形を測定するとICが出力しているデータ26ｈ、27ｈのデータがセルフテストNGになるような数値を出力している。ちなみに商社の対応が悪いからこのコミュニティを頼っている。

HiI just noticed an error in the STM32WB5MM-DK User Manual V5 UM2825:In “Table 19. ARDUINO® connector pinout” there is the signal PE3 at pin 5 of the CN4 connector.The EXTI3_IRQHandler of my project and the Board Schematic V2 MB1292-D01 say otherwise: Its actually PE4.Just letting you know. I was not sure where to input this information and chose to open this thread to have it placed.Maybe someone else might save some time by finding this.Best regardsManuel

I'm developing with an STM32WBA2.I want to communicate via Bluetooth every 10ms, but where in the source code should I modify the default connection interval?I couldn't find a relevant item in CubeMX's STM32_WPAN.

Hello,I implement kind of “lazy write cache” for flash and have problem.The consumer thread sends out cache write requests to the flash thread using events.The flash thread starts a SW timer which fires an event if no more cache write occurs.In the oscilloscope I see that the timer callback is run after timeout occured but the flash thread, which is triggered by the callback, is not executed immediately (it is run as soon as the next cache write event is received).I’m afraid this is a priority problem, but fiddling with task prios doesn’t help.Any idea is greatly appreciated!Thanks, Jochenuint32_t NCB_Cache_Write(eREQID_t eRid, ePNORNUM_t eFid, uint32_t ulOfs, uint8_t bData) { psNcbTaskArgs_t psArgs = &asNcbTaskArgs[eFid]; psArgs->pusBuf[ulOfs] = bData; psArgs->ulAdr = ulOfs; // run core thread after send request called by upper layer / send notification osEventFlagsSet(psArgs->phEventId, NCB_FLAG_FLUSH_REQ);}static void NCB_Timer_CB(void *arg) { // set TIMER event flag of

Hi friends from ST,Is there any description or comment for FDA802A PIN33, I found this pin doesn’t connect to GND like other NC PINs.I am analyzing FDA802A-VYT VCC PIN damaged on China local AMP, and found PIN33 was connected to GND by the previous engineer. (But this pin is float in ST application.)Can this PIN connect to GND cause this damage issue? I have contacted the local FAE from ST in Shanghai, and they knew nothing. 

Hello,I have an STM32H743VIHx project created and developed using STM32CubeMX version 6.16.After automatically migrating the project to STM32CubeMX version 6.18.0 / 6.18.1, I encountered an issue with the FreeRTOS configuration.The migration process completes successfully, but the FreeRTOS configuration is lost. The previously configured FreeRTOS settings, including tasks, queues, semaphores, and other RTOS-related parameters, are no longer available.Furthermore, when I try to open the FreeRTOS configuration section in STM32CubeMX after migration, the configuration page cannot be opened properly.If I generate the code after this migration, all FreeRTOS-related code is automatically removed from the generated project. The generated project no longer contains the expected FreeRTOS initialization and configuration code.Additional information:Figure 1 shows the project after automatic migration from STM32CubeMX 6.16 to 6.18.x.In this migrated project:The FreeRTOS configuration option canno

Hi there, I am after some advice on the best way to implement an FOC BLDC controller on an STM32H725RGV3 based board. I’ve inherited this board and as a result am not able to choose the microcontroller that exists on it. If it were up to me, I would’ve chosen a device from the STM32G4 range. Regardless, I ideally would like to use X-CUBE-MCSDK so I am not re-inventing the wheel, however, the closest boards are the NUCLEO-H745/55ZI-Q which is a dual core stm32h7 based board.Current reading topology: Three Shunt Resistors Control schemes required: FOC (torque control), speed and position control with absolute encoder.Comms interface: CANBus (expect to implement business logic myself)Modulation technique: Ideally SVPWM (is this the default)Motor: CustomWhat is the prescribed workflow for this application? Should I create a board based on the NUCLEO-H745/55ZI-Q and then attempt to modify the IOC to match my board? I was considering trying to use the example project “FOC STM32H745ZI with IH

Hi,I have been using a NUCLEO-H7A3ZI-Q board in a research project for a magnetic spectrometer. The input the the Nucleo board is two short pulses which I have for a year or so, been using to generate trigger pulses using the INP inputs of  COMP1 and COMP2 with INN connected to DAC1_OUT1 and DAC2_OUT2, respectively by on-chip connection. The external outputs of COMP1 and COMP2 drive TIM1 and TIM3 that trigger ADC1 and ADC2.  I used STMCubeMX 6.17.0 and STMCubeIDE 2.1.0 for authoring the code.  I I needed to recompile a new version and I experienced that the output from COMP1 was not working with random fluctuations between 0 and 1. Previously, the COMP1 output was sharp pulse with a duration the input pulse was over the threshold set by DAC1_OUT1. The COMP2 output behaves as it should. I tried to check the output of DAC1_OUT1 and DAC1_OUT2. Only the latter could be directed to an external pin and this worked as intended and produced the signals as expected. DAC_1_OUT1 was restricted to

First, specs:CubeMX Version 6.18.1 on Mac OSXMPU: STM32U595RIT6IDE: VSCode 1.123.0 on Mac OSX OK, So after a large amount of searching on how to add the DSP libararies, which have been moved in recent CubeMX versions, I have a new issue. When trying to build the previously-successful project, I get this error:  I know for a fact the .a file libarary is indeed present where it’s supposed to be. Here is the library section that was modified in the newly-generated makefie: As I mentioned, the .a file is present in Middlewares/ST/Arm/DSP/Lib. Though, I find it weird the error about “-l-Wl,--start-group” not being a file or directory. That just seems bunged up to me. But this is exactly how the makefile came out of CubeMX. Any ideas here? Any help would be massively appreciated! Thanks!

Our team is looking to implement an application based on the upstream Trusted Firmware M (TF-M) framework (https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/) to take advantage of the latest security capabilities provided by the framework.    But we’ve found that with the latest TF-M LTS release, 2.3.x, support for the HW cryptographic acceleration peripherals of the STM32U5 has been removed, due to the migration from mbedTLS to TF-PSA-crypto library.Are there any plans for STM to implement support for crypto HW acceleration for STM32U5 in TF-PSA-crypto and TF-M 2.3.x?

I am working with the STM32U5G9J-DK2 Discovery kit and trying to use the USBX CDC_ACM device example. The available project description says this example demonstrates an Azure RTOS USBX USB device communication class (CDC_ACM) application that emulates a USB-to-UART bridge and provides the required device and class descriptors for a compliant USB CDC_ACM device.According to the example description, the application creates three threads: one to initialize the USB OTG HAL PCD driver and start the device, one to read data from the virtual COM port, and one to send received data over UART. The same description also says that the USB device start/stop is controlled through messages coming from the USB_PD interface when the board is plugged into or unplugged from the host PC.I would like to confirm the correct hardware connection and board configuration for this use case, because the kit also includes an STLINK-V3EC with its own USB Virtual COM port bridge. The documentation states that the

We are evaluating the IIS3DWB10IS for a battery-powered vibration condition-monitoring node (STM32WLE5 + LoRaWAN, ~5 minute duty cycle, multi-year target on a primary cell). Our current IIS3DWB design measures 1.5 µA for the whole node by cutting the sensor's supply rail between wakes.Two things in DS14585 Rev 1 / AN6497 Rev 1 (DM01264337) pull against each other:- IddPD = 26 µA typ makes a load switch effectively mandatory against a 1.5 µA budget.- The ISPU has no non-volatile memory (AN6497 §1), so cutting that rail also erases the program — every wake has to reload it over SPI before it can do anything.My arithmetic says reloading is much the cheaper of the two: at a 300 s cycle, roughly 0.07–0.29 mA·s per wake to reload (4–32 KB program) against 7.8 mA·s to leave the part in power-down. Power-gating wins by 25–100×, and only loses if the node wakes more often than every ~5–11 seconds.But two inputs to that calculation are not in the documentation:What is the ISPU's supply current —

We need to use an ST67W611M1 on an STM32H5, running the Zephyr operating system in softAP mode. Currently, the Zephyr driver for the ST67W611M1 only supports STA mode. Is there a roadmap for this feature?Thanks,Denis M.

I am using the EEPROM emulation (X-CUBE-EEPROM) on a STM32C0.The default setting for number of variables is 100 : In eeprom_emul_conf.h : #define NB_OF_VARIABLES 100U /*!< Number of variables to handle in eeprom */If I understand this emulation correctly, it uses a number of 2K flash pages (minimum 2 for alternating...).Also, each (32bit) variable is stored as 8 bytes : 16bit virtual address, 32bit data, 16bit CRC.I understood there is also some header overhead of 32 bytes per 2K page.So the number of variables fitting in a single page is (2048 - 32) / 8 = 252So my question is then : why is the default value set to 100 io. 252 ???

Hello forum membersI’m busy with the implementation of a TCP server that needs to handle a TCP connection with already existing PC application that I can’t change.Everything works well as long the packets are not longer then 1500 bytes. When the packets are longer than this “magic number” LwIP is separating the packets in more than 1 piece. Is there a way to know the original length of the original packet?See print screen Wireshark: Packet with length: 1876.Debug from the controller:First read: Second read:How can I detect that these 2 reads (netconn_recv) are 1 packet? Instead of 2. I use the NETCONN API.The connection is made at the beginning and never closed during the executing of the PC application. Kind Regards 

Hi!SetupMCU: STM32H573 (Cortex-M33, TrustZone enabled) Secure world: STM32 Secure Manager via SMAK, product state CLOSED Non-secure app: CycloneTCP / CycloneSSL / CycloneCRYPTO (Oryx Embedded) Use case: HTTPS server on a networked device with a long-lived device identity key that must never leave the secure world, plus automated certificate renewal (EST/ACME)What I understand so far!!!mbedTLS consumes the PSA Crypto API natively (MBEDTLS_USE_PSA_CRYPTO plus mbedtls_pk_setup_opaque()), and wolfSSL has partial PSA support via WOLFSSL_HAVE_PSA. Both therefore let the private key stay inside Secure Manager while the non-secure application holds only a psa_key_id_t handle.CycloneCRYPTO has no PSA backend as far as I can tell. Instead it ships register-level STM32H5 ports (stm32h5xx_crypto_pkc.c, stm32h5xx_crypto_cipher.c, stm32h5xx_crypto_hash.c, stm32h5xx_crypto_trng.c) that drive PKA, AES/SAES, HASH and RNG directly. That looks like a direct conflict with Secure Manager, which claims seve

Hi,I need an ST-Link to debug external STM32U0 devices, specifically to modify option bytes and use RDP regression with OEM keys via STM32CubeProgrammer, and I was wondering if the JP6-11 pins on the Nucleo-U083RC could be connected to another MCU to use it as an ST-Link. Thanks in advance 

I have created a project for the STM32WL33 several weeks ago, using the DEEPSTOP mode with context restoration provided by ST. Even if there are some pitfalls with this the project worked mostly fine. But after the update to STM32CubeIDE 2.1.0 I get a compilation error:./System/Startup/cpu_context_switch.o(CPUcontextRestore): Unknown destination type (ARM/Thumb) in ./Core/Src/system_stm32wl3x.odangerous relocation: unsupported relocationmake: *** [makefile:89: Euris3-EHKV-WMBus.elf] Error 1I've reverted the version to 2.0.0 and the error is gone.