Clarification on LPD Boot Timing: Does tbootLPD include regulator turn-On time?
Hello ST Engineer,
I would like to ask a follow-up question regarding the LPD pin timing.
In the ST25 application manual, I found a timing diagram for LPD and VCC in ultra-low power mode. It states that when the RF field is absent and LPD switches to LOW, we need to wait for tbootLPD (0.6 ms) before communication, as shown in the figure below.
However, I also noticed another description in the ST25 datasheet regarding the LPD pin. It mentions that to ensure the internal regulator turns on, its turn-on time (approximately 0.1 ms) must be added to the boot duration, as shown in the figure below.
Given these two pieces of information, could you please clarify: Does this mean that after pulling LPD low, I need to wait for a total of 0.7 ms (0.6 ms + 0.1 ms) before starting communication? Or does the specified tbootLPD (0.6 ms) already include the 0.1 ms regulator turn-on time?
I look forward to your reply.