About Jurni_JasteD

Jurni_JasteD · 2023-07-12

Dear Community,for my application I'm using a STM32H723VGTx to control a sensor via the OSPI interface which is operating in QSPI mode (STM32 master, sensor slave). After I had a look on the bus interface with a Logic Analyzer I'm wondering, if there...

Jurni_JasteD · 2023-07-09

Dear Community,for my application I use the STM32H723VGTx where I'm using the OSPI interface as a SPI and QSPI to control a external sensor (MCU SPI master, sensor SPI slave). Now I face some issues with this communication interface, for debugging re...

Jurni_JasteD · 2023-07-12

Hello @Andreas Bolsch,thank you for your answer!Then I need to check if I can handle the pin levels via pull-up/pull-down resistors to match my application conditions.One further question you might can help me: Do you know if there is a MCU in the in...

Jurni_JasteD · 2023-07-12

Hello JW,thank you for your anwser!I've tested my code with a lower CLK frequency (<20 MHz) and now I get a continuous CLK!Now I have a question based on this, I made further tests where i use these QSPI read operations with provided MDMA for the OSP...

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Re: QSPI unexpected clock behavior STM32H723VGTx