About Hedley

Hedley · 2024-03-25

Facing an issue with the boot* pins. As shipped, BOOT_LOCK==0, NBOOT_SEL == 1, NBOOT[1:0] = 2'b11. Using CubeProgrammer we set the option bytes to:BOOT_LOCK==0, NBOOT_SEL==0, NBOOT[1:0] = 2'b00When NBOOT_SEL == 1, the no external pin jumper setting, ...

Hedley · 2024-03-24

Saw the summit last Tue, 10 stm32u073s arrived Fri from mouser, I had Ada working on it yest (sat). Some work to get the openocd cm0 assembly flash writer to work (l4 version's cm4f code -> cm0+). Ada was the usual porting effort. (I have done F103, ...

Hedley · 2020-05-02

The doc and SVD file don't have a reg at offset 0x44 (GTZC_TZSC_MPCWM3BNSR).Since GTZC_TZSC_MPCWM3ANSR @0x40 exists, via symmetry I would expect B also at 0x44.The doc does say this:GTZC_TZSC external memory x non-secure watermark register 1(GTZC_TZS...

Hedley · 2020-03-29

The sample code uses p256v1 (which seems to actually be p256r1). This curve works well.I Got PKA to sign correctly using p256k1 with some minor curve updates.I am having trouble setting up p224r1. Has anyone got curves other that p256 to work?Tn...

Hedley · 2019-12-11

Reading this cell: 0xe0040000 will hard crash the CPU. You can do it from non secure code also, which opens the way for a possible denial of service attack.In gdb:x/x 0xe0040000I realize parallel trace (the tpiu reg in Q) is not implemented but...

Hedley · 2024-04-19

Solved. A bluepill board has a 100k ohm resistor on the jumper block for boot0. This ended up making PF3 0.864V when 3v3 was the input. I swapped in a 330ohm and I can control boot0 now. I don't need sram boot to really run, it just cannot be boot to...

Hedley · 2024-04-18

Thanks Paradouxe for trying this, I also have a nucleo u083 so I should compare with my stm32u073cc.Not sure why it doesn't work on my end yet.Hedley.

Hedley · 2024-04-02

Yes, that's all crystal clear straight from the RM. My claim is.. on the real soc, nBOOT_SEL== 0 does not consult PF3 on the stm32u073cc. Thx Hedley

Hedley · 2024-03-24

addendum: CubeMX can generate a IDE tool that flips the bit.

Hedley · 2020-07-29

Hi Imen,1.1TnxHedley

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STM32U0 NBOOT_SEL == 0

stm32u0

reg addr's for GTZC_TZSC_MPCWMxANSR GTZC_TZSC_MPCWMxBNSR

PKA - ecdsa curve support

Certain read causes hang/crash

Re: STM32U0 NBOOT_SEL == 0

Re: STM32U0 NBOOT_SEL == 0

Re: STM32U0 NBOOT_SEL == 0

Re: stm32u0

Re: reg addr's for GTZC_TZSC_MPCWMxANSR GTZC_TZSC_MPCWMxBNSR