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STM32U0 NBOOT_SEL == 0

Hedley
Associate III

Facing an issue with the boot* pins. As shipped, BOOT_LOCK==0, NBOOT_SEL == 1, NBOOT[1:0] = 2'b11. 
Using CubeProgrammer we set the option bytes to:
BOOT_LOCK==0, NBOOT_SEL==0, NBOOT[1:0] = 2'b00

When NBOOT_SEL == 1, the no external pin jumper setting, then nboot[1:0] can change the boot from flash to others. But, it appears as if NBOOT_SEL== 0 doesn't seem to work.

The jumpers are as so:
boot.png
On the STM32U073CC, LQFP48, boot1 => PB2-BOOT1 (pin 20), boot0 => PF3-BOOT0(pin 44).

With those options, I have found no external boot0 pin setting can override the part's boot and it always ends up as flash boot. My safety net was always being able to jumper my part back to SRAM boot so SWD can reconnect, here... if that flash is buggy, lets say it shuts down w/o delay or sets DBGMCU.CR = 0, then its not recoverable (unless you can connect SWD really really fast).

The OB OPT reg reads back as:
0x40022000: 0x00040600 0x00000000 0x00000000 0x00000000
0x40022010: 0x00000000 0xc0000000 0x00000000 0x00000000
0x40022020: 0xf8fffeaa 0x000001ff 0x00000000 0x0000007f
0x40022030: 0x0000007f 0x000001ff 0x00000000 0xffffffff
0x40022040: 0x00000000 0x00000000 0x00000000 0x00000000

1 ACCEPTED SOLUTION

Accepted Solutions
Hedley
Associate III

Solved. A bluepill board has a 100k ohm resistor on the jumper block for boot0. This ended up making PF3 0.864V when 3v3 was the input. I swapped in a 330ohm and I can control boot0 now. I don't need sram boot to really run, it just cannot be boot to flash when the flash code does shutdown or debug disable.

Appreciate the check, I should have checked the V, I only checked continuity.

Interestingly, on a U585, same board, with 100k, PF3 is 3.2V (as expected when 3v3 is the boot0 choice). Just the U0 PF3 is odd with the 0.864Vs when 3v3 is the boot value.

 

Tnx

Hedley

View solution in original post

6 REPLIES 6
Roman LUDIN
ST Employee

Hello Hedley, 

thank you for your question.

We will come back to you as soon as possible.

Have a nice day,
Roman

paradouxe
ST Employee

Hello @Hedley,

 

The STM32U073CC has the following boot configuration tools:

  • nBOOT1 (bit)
  • nBOOT0 (bit)
  • BOOT0 (pin)
  • nBOOT_SEL: Used to select which BOOT0 signal will be used
    • 0: BOOT0 pin (legacy mode)
    • 1: NBOOT0 option bit
  • BOOT_LOCK: used to force boot from user area

 

Please refer to the table below to know which boot mode configuration is necessary for you to select Embedded SRAM as boot area.

paradouxe_0-1712071920581.png

Please note that when nBOOT_SEL is 0, pin PF3 (BOOT0) cannot be floating because it is decisive for the selection of the boot area. When nBOOT_SEL is 1, the state of pin PF3 does not matter in the selection of the boot area.

 

Finally, be careful there is no BOOT1 pin on the STM32U073 product.

Yes, that's all crystal clear straight from the RM. My claim is.. on the real soc, nBOOT_SEL== 0 does not consult PF3 on the stm32u073cc.

 

Thx

 

Hedley 

Hello @Hedley,

 

On my side, it works with a NUCLEO-U083RC.
I set the nBOOT_SEL bit to 0 and connected a wire cable between PF3 (BOOT0 pin) and the 3V3. After a reset, I jump into the SRAM code.

Are you sure you have configured your code to be executed from SRAM?
Remember to check your .map file to verify that the startup is configured at the start address of the SRAM.

If the problem persists, do not hesitate to submit an Online support request.

 

Regards,

Paradouxe

 

Thanks Paradouxe for trying this, I also have a nucleo u083 so I should compare with my stm32u073cc.

Not sure why it doesn't work on my end yet.

Hedley.

 

Hedley
Associate III

Solved. A bluepill board has a 100k ohm resistor on the jumper block for boot0. This ended up making PF3 0.864V when 3v3 was the input. I swapped in a 330ohm and I can control boot0 now. I don't need sram boot to really run, it just cannot be boot to flash when the flash code does shutdown or debug disable.

Appreciate the check, I should have checked the V, I only checked continuity.

Interestingly, on a U585, same board, with 100k, PF3 is 3.2V (as expected when 3v3 is the boot0 choice). Just the U0 PF3 is odd with the 0.864Vs when 3v3 is the boot value.

 

Tnx

Hedley