STM32 Summit Q&A

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Resolved! STM32N6 and general MCU questions.

There was discussion of a new 20nm process with more reliability and a new MCU created using it that would be released.Is this the STM32N6?What ARM Cortex M-series will the N6 be? M55 or M85?Will there be an M85 line at some point? What clock speed w...

etheory by Senior II
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STM32WL3MOC

I read that you introduce STM32WL5MOC on the beginning of this year (2024). Do you plan to introduce module like that also for STM32WL33?I saw that STM32WL5MOC is only for 864-928 MHz. Do you plan to introduce modules for 433 MHz, or it will be only ...

I2C Analog Filter Delay Time

 Hi, I tried to solve the questions that occurred during the development of STM32 G0 Series through Googling, but I couldn't find anything related, so I'm leaving a post. This is talk about I2C Analog Filter's Delay Time. According to Reference Manua...

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Odoong by Associate
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Soft Error Rate (SER) information

Does STMicro conduct radiation testing of their products? Where can one find SER information? As a reliability engineer focused on neutron single event effects (NSEE) I am keen on accessing this information.

Resolved! STM32U0 NBOOT_SEL == 0

Facing an issue with the boot* pins. As shipped, BOOT_LOCK==0, NBOOT_SEL == 1, NBOOT[1:0] = 2'b11. Using CubeProgrammer we set the option bytes to:BOOT_LOCK==0, NBOOT_SEL==0, NBOOT[1:0] = 2'b00When NBOOT_SEL == 1, the no external pin jumper setting, ...

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Hedley by Associate III
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Technical Support for STM32f09

I am looking for software pack X-CUBE-STL on ST website. It says that I need to contact Sale representative to sign NDA. I am in Atlanta and I contacted Massachusetts office and left message. No one called me back. I am using STM32f09 micro. can some...

Resolved! stm32u0

Saw the summit last Tue, 10 stm32u073s arrived Fri from mouser, I had Ada working on it yest (sat). Some work to get the openocd cm0 assembly flash writer to work (l4 version's cm4f code -> cm0+). Ada was the usual porting effort. (I have done F103, ...

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Hedley by Associate III
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