About Eqqman

Eqqman · 2024-11-14

Using a Nucleo-F411RE board modified to have 8MHz HSE crystal oscillator and running the OTG peripheral in forced host mode, we are working on implementing our own host stack. With the current code no IRQs trigger until a device is physically attach...

Eqqman · 2024-11-01

Trying to work with the STM32F411 USB OTG peripheral and compiling with Segger Embedded Studio, I'm having trouble clearing out the USB interrupts.The USB peripheral has IRQ bits that are write-1 to clear. As can be seen in the image below, the brea...

Eqqman · 2024-07-24

We have a project running on the STM32F411 via the standard discovery board :https://www.st.com/en/evaluation-tools/32f411ediscovery.htmlIt has been verified that with the STLink port plugged in the BOOT0 pin is at GND and the NRST pin is at 3V. We ...

Eqqman · 2024-04-05

Our project is run on the STM32F411E-DISCO board running under Segger Embedded Studio. All Timers TIM2/TIM5/TIM9/TIM10/TIM11 are being used. Under a debug session everything runs correctly. If we leave the board programmed with the debug code and ...

Eqqman · 2024-03-27

Hello-Working with the STM32F411 on the ST F411 Discovery board, we have set the speed to 72MHz using the HSI as the PLL source. The register values are as follows:RCC->CR = 0x03005C83RCC->PLLCFGR = 0x23001208According to Cube, this configuration is...

Eqqman · 2024-11-14

@waclawek.jan Is your recommendation then that we simply ignore this IRQ and clear it out if we're initializing our USB state machine to the unattached state? EDIT: If we leave the device attached and reset the software, we get PCDET without DISCINT...

Eqqman · 2024-11-07

I changed the code to the following : // Cfg USB OTG peripheral SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_OTGFSRST); CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_OTGFSRST); // Note that the STM32F411...

Eqqman · 2024-11-04

Looks like the scam post is gone, I was debating reporting it before.OTG_FS_GINTSTS is set up as follows :#define OTG_BASE 0x50000000 // [1]p.38//// [1]p.754#define OTG_FS_GINTSTS (*(volatile uint32_t *)(OTG_BASE+0x014)) The reference page numbers ar...

Eqqman · 2024-11-01

Thank you for the feedback, although it does not address my issues.My OP points out that there is a variance in how the GINTSTS register is read between trying to store that value in a local variable vs. what the debugger shows.I specifically mention...

Eqqman · 2024-07-26

Trying to attach the file didn't work.

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STM32F411 IRQs for USB device attachment and detachment both fire in host mode

Problems clearing USB interrupt bits from STM32F411 GINTSTS register

STM32F411 Only running correctly in debug mode with debugger attached

Timers only running correctly in Debug mode and not Release mode on STMF411

Cube says STM32F411 clock configuration is invalid, but processor still runs correctly

Re: STM32F411 IRQs for USB device attachment and detachment both fire in host mode

Re: Problems clearing USB interrupt bits from STM32F411 GINTSTS register

Re: Problems clearing USB interrupt bits from STM32F411 GINTSTS register

Re: Problems clearing USB interrupt bits from STM32F411 GINTSTS register

Re: STM32F411 Only running correctly in debug mode with debugger attached