2021-07-23 03:08 AM
From L475 datasheet and reference manual it was mentioned that the WWDG clock source is from PCLK1. Whether PCLK1 Timer or Peripheral clock is used for WWDG? I couldn't find the details..
Attached reference image from cubeMX
Thanks
2021-07-23 07:42 AM
WWDG is in APB1 and is clocked from PCLK1.
2021-07-25 10:22 PM
Thank you.
If it is PCLK1, then with below configuration of counter and window value I am trying to reload the counter every 2.5ms but the uC reset is happening because of the counter value is greater than window value. What could be the reason?
But if I configure the window and counter value(considering 36MHz) as (WWDG_CR_T_6 | 0x14) and (WWDG_CR_T_6 | 0x1D) respectively then it is working fine.
HCLK is 72 MHz
APB1 Prescaler is 4
PCLK1 is 18MHz
// Watchdog Window ((15 - 9) * 227) = 1.362
#define WWDG_WINDOW_VALUE (WWDG_CR_T6 | 0x09)
// Watchdog Counter ((14+1) * 227uS) = 3.41 mS
#define WWDG_COUNTER_VALUE (WWDG_CR_T6 | 0x0E)
void WWDG_Initialize(void)
{
// Enable debug mode for WWDG
DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_WWDG_STOP;
// Enable WWDG global interrupt.
NVIC->ISER[0] |= NVIC_ISER_SETENA_0;
// Enable clock for windowed watchdog
RCC->APB1ENR1 |= RCC_APB1ENR1_WWDGEN;
// Set base prescaler to div. 1.
WWDG->CFR &= ~WWDG_CFR_WDGTB;
// Reset window.
WWDG->CFR &= ~WWDG_CFR_W;
// Preset window.
WWDG->CFR |= (WWDG_CFR_W & WWDG_WINDOW_VALUE);
WWDG->CR = WWDG_CR_WDGA | (WWDG_CR_T & WWDG_COUNTER_VALUE);
// Clear early wakeup flag.
WWDG->SR = 0x00000000;
// Enable Early Wakeup interrupt.
WWDG->CFR |= WWDG_CFR_EWI;
}
void WWDG_Reset(void)
{
WWDG->CR = (WWDG_CR_T & WWDG_COUNTER_VALUE);
}