Dear ST-Staff,
I didn't notice existence of PrefetchBuffer on STM32H5 until this topic.
I updated my NUCLEO-H563ZI example project with PrefetchBuffer enable.
Here is piece of a sample,I put PrefetchBuffer enable routine after SysClock ramp-uped.
/**************************************************************************/
/*!
@brief Configures Main system clocks & power.
@brief System Clock Configuration
The system Clock is configured as follows :
System Clock source = PLL (HSE:8MHz)
SYSCLK(Hz) = 250000000
HCLK(Hz) = 250000000
AHB Prescaler = 1
APB1 Prescaler = 1
APB2 Prescaler = 1
PLL_M = 4
PLL_N = 250
PLL_P = 2
PLL_Q = 5
PLL_R = 2
PLL_FRACN = 0
Flash Latency(WS) = 5
@param None
@retval None
*/
/**************************************************************************/
static void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIGITAL;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 4; /* HSE:8MHz/4 = 2MHz */
RCC_OscInitStruct.PLL.PLLN = 250; /* 2MHz*250 = 500MHz */
RCC_OscInitStruct.PLL.PLLP = 2; /* 500MHz/2 = 250MHz */
RCC_OscInitStruct.PLL.PLLQ = 5; /* 500MHz/5 = 100MHz (for SDMMC/SPI) */
RCC_OscInitStruct.PLL.PLLR = 2; /* 500MHz/2 = 250MHz */
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
RCC_OscInitStruct.PLL.PLLFRACN = 0;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
for(;;){
__NOP();
}
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|RCC_CLOCKTYPE_PCLK3;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; /* SYSCLOCK :250MHz */
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; /* PCLK1 :250MHz */
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; /* PCLK2 :250MHz */
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; /* PCLK3 :250MHz */
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
{
for(;;){
__NOP();
}
}
/* If Latency is at least one wait state,then set prefetch buffer enable to improve performance! */
if (__HAL_FLASH_GET_LATENCY() != FLASH_ACR_LATENCY_0WS)
{
if(!(FLASH->ACR & FLASH_ACR_PRFTEN)) {
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
}
}
/* I/O Compensation for fast interface(OCTO-SPI,SDMMC,SPI,SAI). */
/* Activate CSI clock mandatory for I/O Compensation Cell*/
__HAL_RCC_CSI_ENABLE() ;
/* Enable SBS clock mandatory for I/O Compensation Cell */
__HAL_RCC_SBS_CLK_ENABLE() ;
/* Enables the I/O Compensation Cell */
HAL_SBS_EnableVddIO1CompensationCell();
HAL_SBS_EnableVddIO2CompensationCell();
}
Entire my project for NUCLEO-H563ZI is here.
To be honest, thanks to strong I-Cache,
the PrefetchBuffer enabled effect is not felt so much(THIS IS A INDIVIDUALLY THOUGHT).
Anyway,works stable for week.I like H5.
I'll research more detail and report on my blog in the future.
Best regards,
Nemui.
