HAL_RCC_GetPCLK2Freq() returns incorrect value when D2PPRE2 is set to divide by 2

[lyl]

my english is not good,i use chatgpt to help me to generate this post.

Hello,

I am working on a project with the STM32H750 microcontroller using CubeMX-generated code and HAL library. My system clock configuration is as follows:

• HCLK: 240 MHz
• PCLK2: Configured via D2PPRE2

I encountered an issue related to HAL_RCC_GetPCLK2Freq() and UART configuration. Here is the detailed description:

Issue Description

• When D2PPRE2 (APB2 prescaler) is set to no division (DIV1), HAL_RCC_GetPCLK2Freq() correctly returns 240 MHz, and the UART works as expected at the configured baud rate (e.g., 115200).
• However, when D2PPRE2 is configured to divide by 2 (DIV2):
  • HAL_RCC_GetPCLK2Freq() still returns 240 MHz (unaffected by the prescaler).
  • The UART actual baud rate becomes half of the configured value (e.g., if I configure 115200, the actual baud rate is 57600).
  • This indicates that the prescaler is applied to PCLK2 in hardware, but the HAL function does not account for it correctly.

Steps to Reproduce

1. Configure D2PPRE2 to DIV2 in CubeMX.
2. Initialize UART with a baud rate of 115200 using HAL_UART_Init().
3. Measure the actual UART baud rate using an oscilloscope or logic analyzer.

STM32CubeIDE Version: 1.17.0