2024-06-19 01:41 AM
Now I'm implementing interrupt in USART1(PB7,PB6) and UART3(PC4,PC5).
So I wrote a USART1 code at first and It is working well.
However, I added a USART3 code and USART1 which is not working well even USART3.
I used this code.
USART_Communication_Rx_IT_Continuous_Init
Working well
void StartReception(void)
{
/* Initializes Buffer swap mechanism :
- 2 physical buffers aRXBufferA and aRXBufferB (RX_BUFFER_SIZE length)
*/
pBufferReadyForReception = aRXBufferA;
pBufferReadyForUser = aRXBufferB;
uwNbReceivedChars = 0;
uwBufferReadyIndication = 0;
/* Clear Overrun flag, in case characters have already been sent to USART */
LL_USART_ClearFlag_ORE(USART1);
/* Enable RXNE and Error interrupts */
LL_USART_EnableIT_RXNE(USART1);
LL_USART_EnableIT_ERROR(USART1);
}
After adding the USART3 code, it is not working
void StartReception(void)
{
/* Initializes Buffer swap mechanism :
- 2 physical buffers aRXBufferA and aRXBufferB (RX_BUFFER_SIZE length)
*/
pBufferReadyForReception = aRXBufferA;
pBufferReadyForUser = aRXBufferB;
uwNbReceivedChars = 0;
uwBufferReadyIndication = 0;
USART3_pBufferReadyForReception = USART3_aRXBufferA;
USART3_pBufferReadyForUser = USART3_aRXBufferB;
USART3_uwNbReceivedChars = 0;
USART3_uwBufferReadyIndication = 0;
/* Clear Overrun flag, in case characters have already been sent to USART */
LL_USART_ClearFlag_ORE(USART1);
LL_USART_ClearFlag_ORE(USART3);
/* Enable RXNE and Error interrupts */
LL_USART_EnableIT_RXNE(USART1);
LL_USART_EnableIT_ERROR(USART1);
LL_USART_EnableIT_RXNE(USART3);
LL_USART_EnableIT_ERROR(USART3);
}
2024-06-19 06:08 AM - edited 2024-06-19 06:10 AM
So does just the code for USART3 work on its own?
You haven't shown any of your initialisation, nor your interrupt handlers.
2024-06-19 05:13 PM
Yes, it did. USART1 and USART3 are working well separately.
I put initialisation, inetrrupt handler, callback code here.
static void MX_USART1_UART_Init(void)
{
/* USER CODE BEGIN USART1_Init 0 */
/* USER CODE END USART1_Init 0 */
LL_USART_InitTypeDef USART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
/** Initializes the peripherals clocks
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
/* Peripheral clock enable */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
/**USART1 GPIO Configuration
PB6 ------> USART1_TX
PB7 ------> USART1_RX
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_6;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_0;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_0;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USART1 interrupt Init */
NVIC_SetPriority(USART1_IRQn, 0);
NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
USART_InitStruct.PrescalerValue = LL_USART_PRESCALER_DIV1;
USART_InitStruct.BaudRate = 9600;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
USART_InitStruct.Parity = LL_USART_PARITY_NONE;
USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
LL_USART_Init(USART1, &USART_InitStruct);
LL_USART_SetTXFIFOThreshold(USART1, LL_USART_FIFOTHRESHOLD_1_8);
LL_USART_SetRXFIFOThreshold(USART1, LL_USART_FIFOTHRESHOLD_1_8);
LL_USART_DisableFIFO(USART1);
LL_USART_ConfigAsyncMode(USART1);
/* USER CODE BEGIN WKUPType USART1 */
/* USER CODE END WKUPType USART1 */
LL_USART_Enable(USART1);
/* Polling USART1 initialisation */
while((!(LL_USART_IsActiveFlag_TEACK(USART1))) || (!(LL_USART_IsActiveFlag_REACK(USART1))))
{
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
/**
* @brief USART3 Initialization Function
* @PAram None
* @retval None
*/
static void MX_USART3_UART_Init(void)
{
/* USER CODE BEGIN USART3_Init 0 */
/* USER CODE END USART3_Init 0 */
LL_USART_InitTypeDef USART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
/** Initializes the peripherals clocks
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3;
PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART3);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOC);
/**USART3 GPIO Configuration
PC4 ------> USART3_TX
PC5 ------> USART3_RX
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_4;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_0;
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_5;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_0;
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* USART3 interrupt Init */
NVIC_SetPriority(USART3_4_5_6_LPUART1_IRQn, 0);
NVIC_EnableIRQ(USART3_4_5_6_LPUART1_IRQn);
/* USER CODE BEGIN USART3_Init 1 */
/* USER CODE END USART3_Init 1 */
USART_InitStruct.PrescalerValue = LL_USART_PRESCALER_DIV1;
USART_InitStruct.BaudRate = 9600;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
USART_InitStruct.Parity = LL_USART_PARITY_NONE;
USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
LL_USART_Init(USART3, &USART_InitStruct);
LL_USART_SetTXFIFOThreshold(USART3, LL_USART_FIFOTHRESHOLD_1_8);
LL_USART_SetRXFIFOThreshold(USART3, LL_USART_FIFOTHRESHOLD_1_8);
LL_USART_DisableFIFO(USART3);
LL_USART_ConfigAsyncMode(USART3);
/* USER CODE BEGIN WKUPType USART3 */
/* USER CODE END WKUPType USART3 */
LL_USART_Enable(USART3);
/* Polling USART3 initialisation */
while((!(LL_USART_IsActiveFlag_TEACK(USART3))) || (!(LL_USART_IsActiveFlag_REACK(USART3))))
{
}
/* USER CODE BEGIN USART3_Init 2 */
/* USER CODE END USART3_Init 2 */
}
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
if (LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1))
{
/* RXNE flag will be cleared by reading of RDR register (done in call) */
/* Call function in charge of handling Character reception */
USART_CharReception_Callback();
}
else
{
/* Call Error function */
}
/* USER CODE END USART1_IRQn 0 */
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
* @brief This function handles USART3, USART4, USART5, USART6, LPUART1 globlal Interrupts (combined with EXTI 28).
*/
void USART3_4_5_6_LPUART1_IRQHandler(void)
{
/* USER CODE BEGIN USART3_4_5_6_LPUART1_IRQn 0 */
if (LL_USART_IsActiveFlag_RXNE(USART3) && LL_USART_IsEnabledIT_RXNE(USART3))
{
/* RXNE flag will be cleared by reading of RDR register (done in call) */
/* Call function in charge of handling Character reception */
USART3_CharReception_Callback();
}
else
{
/* Call Error function */
}
/* USER CODE END USART3_4_5_6_LPUART1_IRQn 0 */
/* USER CODE BEGIN USART3_4_5_6_LPUART1_IRQn 1 */
/* USER CODE END USART3_4_5_6_LPUART1_IRQn 1 */
}
void USART_CharReception_Callback(void) {
uint8_t *ptemp;
/* Read Received character. RXNE flag is cleared by reading of RDR register */
pBufferReadyForReception[uwNbReceivedChars++] = LL_USART_ReceiveData8(
USART1);
/* Checks if Buffer full indication has been set */
if (uwNbReceivedChars >= RX_BUFFER_SIZE) {
/* Set Buffer swap indication */
uwBufferReadyIndication = 1;
/* Swap buffers for next bytes to be received */
ptemp = pBufferReadyForUser;
pBufferReadyForUser = pBufferReadyForReception;
pBufferReadyForReception = ptemp;
uwNbReceivedChars = 0;
}
}
void USART3_CharReception_Callback(void) {
uint8_t *ptemp;
/* Read Received character. RXNE flag is cleared by reading of RDR register */
USART3_pBufferReadyForReception[USART3_uwNbReceivedChars++] = LL_USART_ReceiveData8(
USART3);
/* Checks if Buffer full indication has been set */
if (USART3_uwNbReceivedChars >= RX_BUFFER_SIZE) {
/* Set Buffer swap indication */
USART3_uwBufferReadyIndication = 1;
/* Swap buffers for next bytes to be received */
ptemp = USART3_pBufferReadyForUser;
USART3_pBufferReadyForUser = USART3_pBufferReadyForReception;
USART3_pBufferReadyForReception = ptemp;
USART3_uwNbReceivedChars = 0;
}
}