2021-10-27 02:41 AM
I'm using the ST32F4 discovery board, and would glad if someone could explain the relationship between the PLLI2S Clock setup in CubeIDE and the actual I2S2_CK (PB10) to the mems mic. I my case I use PLLN=192 and PLLR=3 giving 64MHz I2S Clocks. So my question is: how is the I2S2_CK on pin PB10 derived from the main 64 MHz I2S clocks? Is the 64 MHz I2S Clocks the same as the optional I2S2 Master Clock output on pin PC6.
Solved! Go to Solution.
2021-10-27 01:30 PM
2021-10-27 01:30 PM
JW
2021-10-27 02:57 PM
Thank you Jan. This was a very helpful and good explanation.