FAQs
cancel
Turn on suggestions
Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.
Showing results for 
Search instead for 
Did you mean: 

[Nucleo-n6570-q] About XSPI LR can't run in SYSB at 400MHZ when number of memory data lines set 8line

bioak
Associate II

‎2025-07-07 1:42 AM

Hello, 

I'm learning about the STM32N6 LR and XIP examples and want to get hands-on with them. I've already set OTP124 to 0x8000.

bioak_0-1751875928615.png

 

If SYSB is configured to 400MHz, the number of memory data lines must be set to 1 line and disable "X_ICACHE_Init()" for the app to function.

bioak_1-1751877350600.png

 

However, if SYSB is set to 80MHz, the number of memory data lines can be configured to 8 lines  and disable "X_ICACHE_Init()", and the app still works.

bioak_2-1751877530482.png

 

I'm very confused by this result and wonder if anyone has encountered the same problem or knows what I should modify?

Thank you.

Labels:
STM32N6Q_LR_SYSB_80MHZ.7z
STM32N6Q_LR_SYSB_400MHZ.7z
0 Kudos
0 REPLIES 0
Top