What is the role of the m4_*** node in Cortex-A7 Device tree?

[HMasu.1]

I want to know the role of the m4_***(for example m4_adc, m4_timers1) node in Cortex-A7 Device tree.

When I generate device tree from CubeMX, the m4_*** node are described even if that peripherals are used only on Cortex-M4 FW.

Do I need to set status = "okay" in Cortex-A7 device tree even if ​that peripherals are used only on Cortex-M4 FW?

for example, When I use timer6 only on Cortex-M4 FW, Do I need to describe that status = "okay" in m4_timers6 node in device tree?

Best regards,

H. Masuda

[ArmandG · Accepted solution]

Hi @HMasu.1​ ,

m4_*** nodes in device tree can be used to assign pins to functions, in your case the m4_timers6 node with only "status=okay" is just signaling that TIM6 is enabled on M4 side. So you don't really need to add this line to the device tree if there is no more instructions, it is just automatically generated.

I hope it helped.

Best regards,

Armand

[HMasu.1]

Hi @ArmandG​ 

Thank you for your answer.

I understood that the m4_*** node with only "status=okay" is just signaling that *** peripheral is enabled on M4 side, and don' t need to add any line if there is no more instructions

("status=okay" is automatically generated by STM32CubeMX ).

H. Masuda