STM32MP1 support ...

[AvaTar]

I guess most have noticed the recent anouncement of the STM32MP1, a dual core unit with a Cortex A7 and a M4.

Hard data seem a bit scarce yet, though.

What toolchain will support this combo, and when ?

Does the mentioned STLink V3 support concurrent debugging of both cores ?

What about an evaluation hardware ?

And a Linux version ?

And what about the interest in dual-cores on customer's side, or is it just a case of # metoo ? 😉

[Olivier GALLIEN]

Yes lot of data already available on usual st.com product site, and I guess the new https://wiki.st.com/stm32mpu might answer most of your questions.

Olivier

[AvaTar]

Thank you, going to have look.

General experience teached me not to be a "very early adopter", though ... 😉

[AvaTar]

Reading the data brief for the MP1 discovery kit, some things struck me odd.

• 4-Gbit DDR3L, 16 bits, 533 MHz

Really, 16 bit ?

> Development toolchains ...

> Note: On Windows® only.

For a Linux environment ???

Should not be difficult to run an ARM toolchain on the target (A7), at least in console mode. I hope your OpenSTLinux distro includes one.

Any target tools to download executables from the Linux file system (A7) to the M4, and start them ?

[Olivier GALLIEN]

Hi,

> Development toolchains ...

> Note: On Windows® only.

Note is applicable only for IAR and KEIL toolchain adressing M4.

Of course Linux GCC toolchain require Linux host system.

SW4STM32 support the load and start of M4 from the Linux (A7) file system ( aka "Production mode" )

Olivier

[AvaTar]

> SW4STM32 support the load and start of M4 from the Linux (A7) file system ( aka "Production mode" )

I hope you don't imply running SW4STM32 (Eclipse) on the A7 core of the target ...

My idea - controlling a toolchain on the A7 core via cmd line, and push the generated executable into the M4 core by a tool running on the A7 core.

Such tools do exist for similar asymmetric dual-core systems, and would be easy to integrate into a make file approach.

Once I find the spare time, I need to read the reference manual, to see how the M4/A7 cores are tied together, and how they are supposed to communicate.

[Jaroslav BECKA]

Hello AvaTar,

you may find the following article from wiki useful

https://wiki.st.com/stm32mpu/wiki/Coprocessor_management_overview