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OP-TEE error (TZC permission failure) on new v5.0.0 SDK

cfilipescu
Senior

Hi,

I am trying to migrate my project (custom board using stm32mp153a and 256MB mem) from 4.1.0 to 5.0.0 but I am getting a panic when booting u-boot:

Board: MBfdd8 Var2.15 Rev.B-14 DRAM: 256 MiB E/TC:0 tzc_it_handler:79 TZC permission failure E/TC:0 dump_fail_filter:420 Permission violation on filter 0 E/TC:0 dump_fail_filter:425 Violation @0xcff09000, non-secure privileged write, AXI ID 480 M/TC: CPU : 0 M/TC: usr_sp : 0x00000000 M/TC: usr_lr : 0x00000000 M/TC: irq_spsr : 0x00000000 M/TC: irq_sp : 0x00000000 M/TC: irq_lr : 0x00000000 M/TC: fiq_spsr : 0x00000000 M/TC: fiq_sp : 0x00000000 M/TC: fiq_lr : 0x00000000 M/TC: svc_spsr : 0x00000000 M/TC: svc_sp : 0xcdef2ca0 M/TC: svc_lr : 0xcff0a2f0 M/TC: abt_spsr : 0x00000000 M/TC: abt_sp : 0x00000000 M/TC: abt_lr : 0x00000000 M/TC: und_spsr : 0x00000000 M/TC: und_sp : 0x00000000 M/TC: und_lr : 0x00000000 M/TC: pmcr : 0x41072000 E/TC:0 Panic M/TC: CPU : 0 M/TC: usr_sp : 0x00000000 M/TC: usr_lr : 0x00000000 M/TC: irq_spsr : 0x00000000 M/TC: irq_sp : 0x00000000 M/TC: irq_lr : 0x00000000 M/TC: fiq_spsr : 0x00000000 M/TC: fiq_sp : 0x00000000 M/TC: fiq_lr : 0x00000000 M/TC: svc_spsr : 0x00000000 M/TC: svc_sp : 0xcdef2ca0 M/TC: svc_lr : 0xcff0a2f0 M/TC: abt_spsr : 0x00000000 M/TC: abt_sp : 0x00000000 M/TC: abt_lr : 0x00000000 M/TC: und_spsr : 0x00000000 M/TC: und_sp : 0x00000000 M/TC: und_lr : 0x00000000 M/TC: pmcr : 0x41072000
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 I am posting the full boot log as an attachment.

I am stuck any help is appreciated.

12 REPLIES 12

I am glad it helped at least one more person.

Yes, but why does this working? @cfilipescu 

 

optee@ce000000 { reg = <0xce000000 0x2000000>; no-map; };

 

 

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-Computer

It changes the location of the optee in memory so that it is inside the 256MB