2021-11-01 10:35 AM
I'm just confused since other kits (ex: STM32H750B-DK) have provisions for jumping the 2 lines together, but the wiki does not indicate the BK2_NCS GPIO (from the MPU) is even used by the BootROM. I wanted clarification of the statement made on the wiki article, mainly to be sure that shorting the BK1_NCS and BK2_NCS lines weren't required to put the QuadSPI in dual-bank mode. The statement on the wiki might be misleading.
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2021-11-02 07:30 AM
Hello @DPade.1 ,
You are right. The wiki is not enough clear on this topic. I will update the page.
Regarding the hardware side, the clearer information available are in the AN5031: https://www.st.com/resource/en/application_note/dm00389996-getting-started-with-stm32mp1-series-hardware-development-stmicroelectronics.pdf
You can find page 65 the figure 40 that explains for the EV1 board how to use the dual mode in QUAD SPi.
So yes, if you want to use a 8 bit flash (via 2 devices 4 bits), you can let the BK2_nCS not used and uses only the BK1_nCS to drive the two Chip Selects (CS).
On the EV1 board, it is possible to realize that by using the jumpers. As visible in the schematic of the EV1: https://www.st.com/content/ccc/resource/technical/layouts_and_diagrams/schematic_pack/group0/10/9b/9c/41/45/78/41/eb/mb1262-c01_schematic/files/MB1262-C01_schematic.pdf/jcr:content/translations/en.MB1262-C01_schematic.pdf
You have to remove SB60 and put SB61.
Hope it helps,
Regards,
Kevin
2021-11-02 03:06 AM
Hi @DPade.1 ,
To understand more clearly the behavior of BK1_nCS and BK2_nCS, I advise you to read the reference manual (RM0436): https://www.st.com/resource/en/reference_manual/DM00327659-.pdf
Especially the page 1483 (in current revision of the document, v5.0).
You can also search information about "nCS" inside the ref man. There are several paragraphs that talk about these pins.
Regards,
Kevin
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2021-11-02 06:09 AM
Then it seems that under BootROM, BK2_nCS GPIO is not actually initialized for Quad SPI AFmux by default. Therefore, BK1_nCS must be used to drive the second chip unless BK2_nCS is initialized via OTP.
In the wiki (https://wiki.st.com/stm32mpu/wiki/STM32MP15_ROM_code_overview#Boot_from_serial_NOR), it would be clearer to say that both chip selects should be driven by BK1_nCS rather than saying that the two nCS lines should be shorted together. The latter implies there is some special reason for shorting the GPIO pins together, but based on the reference manual this doesn't seem to be the case. Can you confirm that there is nothing special happening with these two pins in the BootROM?
2021-11-02 07:30 AM
Hello @DPade.1 ,
You are right. The wiki is not enough clear on this topic. I will update the page.
Regarding the hardware side, the clearer information available are in the AN5031: https://www.st.com/resource/en/application_note/dm00389996-getting-started-with-stm32mp1-series-hardware-development-stmicroelectronics.pdf
You can find page 65 the figure 40 that explains for the EV1 board how to use the dual mode in QUAD SPi.
So yes, if you want to use a 8 bit flash (via 2 devices 4 bits), you can let the BK2_nCS not used and uses only the BK1_nCS to drive the two Chip Selects (CS).
On the EV1 board, it is possible to realize that by using the jumpers. As visible in the schematic of the EV1: https://www.st.com/content/ccc/resource/technical/layouts_and_diagrams/schematic_pack/group0/10/9b/9c/41/45/78/41/eb/mb1262-c01_schematic/files/MB1262-C01_schematic.pdf/jcr:content/translations/en.MB1262-C01_schematic.pdf
You have to remove SB60 and put SB61.
Hope it helps,
Regards,
Kevin
2021-11-02 07:46 AM
Hello @Kevin HUBER ,
Thank you for the clarifications and the additional document references. I really just wanted to make sure the BootROM wasn't doing something special with those two nCS pins. Now I am much more confident that we won't need a jumper between those 2 nCS pins for our own board design.