Using ADC with DMA on M4 causes DMA transfer error

[Emma]

We are trying to use circular DMA to transfer data from ADC1 into a buffer in MCU SRAM using CubeMX-generated code to configure the ADC and DMA. The DMA stream encounters a transfer error on transferring the first item. I have tried clearing the DMA error flags before starting the transfer with HAL_ADC_Start_DMA but that did not help.

The device is an STM32MP157C running in Production mode. ADC1 and DMA2 are assigned to the M4 core.

Using a debugger it can be seen that the peripheral address and memory address are configured correctly for the DMA stream. However, the DMA_HWCFGR1 register for DMA2 shows that all streams are in double-buffer mode despite the DBM bit being cleared in the stream configuration register, is this normal?

CubeMX-generated code:

static void MX_ADC1_Init(void)

{

 /* USER CODE BEGIN ADC1_Init 0 */

 /* USER CODE END ADC1_Init 0 */

 ADC_MultiModeTypeDef multimode = {0};

 ADC_ChannelConfTypeDef sConfig = {0};

 /* USER CODE BEGIN ADC1_Init 1 */

 /* USER CODE END ADC1_Init 1 */

 /** Common config

 */

 hadc1.Instance = ADC1;

 hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;

 hadc1.Init.Resolution = ADC_RESOLUTION_12B;

 hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;

 hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;

 hadc1.Init.LowPowerAutoWait = DISABLE;

 hadc1.Init.ContinuousConvMode = ENABLE;

 hadc1.Init.NbrOfConversion = 8;

 hadc1.Init.DiscontinuousConvMode = DISABLE;

 hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;

 hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;

 hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_CIRCULAR;

 hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;

 hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;

 hadc1.Init.OversamplingMode = DISABLE;

 if (HAL_ADC_Init(&hadc1) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure the ADC multi-mode

 */

 multimode.Mode = ADC_MODE_INDEPENDENT;

 if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_10;

 sConfig.Rank = ADC_REGULAR_RANK_1;

 sConfig.SamplingTime = ADC_SAMPLETIME_64CYCLES_5;

 sConfig.SingleDiff = ADC_SINGLE_ENDED;

 sConfig.OffsetNumber = ADC_OFFSET_NONE;

 sConfig.Offset = 0;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

/* Other channels omitted here */

}

void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)

{

 GPIO_InitTypeDef GPIO_InitStruct = {0};

 if(hadc->Instance==ADC1)

 {

 /* USER CODE BEGIN ADC1_MspInit 0 */

 /* USER CODE END ADC1_MspInit 0 */

   /* Peripheral clock enable */

   HAL_RCC_ADC12_CLK_ENABLED++;

   if(HAL_RCC_ADC12_CLK_ENABLED==1){

     __HAL_RCC_ADC12_CLK_ENABLE();

   }

/* GPIO init omitted here */

   /* ADC1 DMA Init */

   /* ADC1 Init */

   hdma_adc1.Instance = DMA2_Stream0;

   hdma_adc1.Init.Request = DMA_REQUEST_ADC1;

   hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;

   hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;

   hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;

   hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;

   hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;

   hdma_adc1.Init.Mode = DMA_CIRCULAR;

   hdma_adc1.Init.Priority = DMA_PRIORITY_HIGH;

   hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;

   if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)

   {

     Error_Handler();

   }

   __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);

 /* USER CODE BEGIN ADC1_MspInit 1 */

 /* USER CODE END ADC1_MspInit 1 */

 }

static void MX_DMA_Init(void)

{

 /* DMA controller clock enable */

 __HAL_RCC_DMAMUX_CLK_ENABLE();

 __HAL_RCC_DMA2_CLK_ENABLE();

 /* DMA interrupt init */

 /* DMA2_Stream0_IRQn interrupt configuration */

 HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);

 HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);

 /* DMA2_Stream1_IRQn interrupt configuration */

 HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0);

 HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);

 /* DMA2_Stream2_IRQn interrupt configuration */

 HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 4, 0);

 HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);

 /* DMA2_Stream3_IRQn interrupt configuration */

 HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 4, 1);

 HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);

 /* DMA2_Stream4_IRQn interrupt configuration */

 HAL_NVIC_SetPriority(DMA2_Stream4_IRQn, 4, 0);

 HAL_NVIC_EnableIRQ(DMA2_Stream4_IRQn);

 /* DMA2_Stream5_IRQn interrupt configuration */

 HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 4, 1);

 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn);

 /* DMA2_Stream6_IRQn interrupt configuration */

 HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 1);

 HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);

}

void DMA2_Stream0_IRQHandler(void)

{

 /* USER CODE BEGIN DMA2_Stream0_IRQn 0 */

 /* USER CODE END DMA2_Stream0_IRQn 0 */

 HAL_DMA_IRQHandler(&hdma_adc1);

 /* USER CODE BEGIN DMA2_Stream0_IRQn 1 */

 /* USER CODE END DMA2_Stream0_IRQn 1 */

}

[MMevo.1]

Hi,

I got an answer on my STM32H7 DMA issue here-

https://community.st.com/s/question/0D53W00001IAXx5SAH/using-adc-with-dma-on-h7-causes-dma-transfer-error

Thanks,

Maor