STMWB55: Flash write access during BLE connection

[APort]

Hello,

We are trying to write(erase) the flash during BLE connection.

If we follow the STM32Cube_FW_WB_V1.4.0/Projects/P-NUCLEO-WB55.Nucleo/Examples/FLASH/FLASH_EraseProgram

Example the BLE connection terminates immediately (timeout error code).

Apparently you have to let the CPU2 know that you are about to access the flash. The only example I found for this is:

STM32Cube_FW_WB_V1.4.0/Middlewares/ST/STM32_WPAN/ble/mesh/PAL/STM32WB/pal_nvm.c

It works when BLE is not connected.

When there is an active connection the code is stuck in dead-loop on first:

while(LL_FLASH_IsActiveFlag_OperationSuspended());

(pal_nvm.c line 226).

Once BLE device is disconnected, it passes this while.

Now... I am trying to erase a single sector, and this happens even before address is given or anything; no prior errors.

The Erase is called from main loop handler.

CPU2 firmware used is 1.4.0 (latest).

Any ideas?

Thanks in advance.

[Scott Löhr]

@APort​ and/or @lukasz2​ - have either of you found a best solution for erasing a flash page without breaking the BLE connection?

I have success with a function that I created to align with the BLE interval to ensure the most time possible for the page erase - call the align function immediately before making the page erase. I posted this function in my own question about the proper order and usage of the semaphores to coordinate with CPU2, I hope it helps and let me know if you found the exact steps to follow wrt the semaphores:

https://community.st.com/s/question/0D53W00000914bCSAQ/stm32wb-hsem-flash-semaphore-usage

[Remi QUINTIN]

Regarding the example provided in the CubeWB FW package regarding writing some data into the flash memory without losing the connection, please have a look at the project under Projects\P-NUCLEO-WB55.Nucleo\Applications\BLE\BLE_RfWithFlash directory.

[Vyacheslav]

Hi guys.

I try to change "slave latency" to (!=0) as example = 3. And problem with while(LL_FLASH_IsActiveFlag_OperationSuspended()); is disappeared.

But not on all phones.

For example, MIUI refuses to work.

But I don’t understand why the choice of phones affects the work with flash on chip :).

[Christophe Arnal]

Hello,

The only action that could be blocked is the flash erase procedure. There is always some time to fit a "write flash" operation.

You need the radio to be idle for at least 25ms to fit an "erase flash operation" so I believe that depending on the remote phone used, the radio interval may be different and some time, it does not provide a 25ms idle time required to fit an "erase flash operation"

Regards.

[Vyacheslav]

Hi.

I fixed the problem by setting the connection intreval to 50-60 msec because cpu2 needs 25ms to erase 1 page, and mine is erased 2 pages.

[Christophe Arnal]

Hello,

Note that it would have been possible to have a 30ms connection interval. In that case, there would have been one page erased by interval.

Regards.

[Vyacheslav]

Yes, I know, but sometimes by our protocol wee need an erase 2 pages by one time.

[Jonny]

Hello,

I'm currently working on an STM32WB5MMG module and while working with the BLE Mesh implementation I found something strange in the source STM provided.

On my main application I do some Write/Erase operation on flash and doing so I use all the guidelines that I found in the application notes and on this discussion.

However, I faced a problem on a part of the code that uses some libraries provided by ST for flash operation.

Sometimes (this is not something that happens all the time) my code remains stuck on this function

PalNvmErase

What I can see is that on this function there is only this check before trying to erase or write the Flash

 while( LL_HSEM_1StepLock( HSEM, CFG_HW_FLASH_SEMID ) );

I remain stuck on this while cycle

 while(LL_FLASH_IsActiveFlag_OperationSuspended());

Has this something to do with the fact that on this driver there aren't this two checks before any writing or erasing operation ?

 
cpu1_sem_status = (SemStatus_t)LL_HSEM_GetStatus(HSEM, CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID);
 if(cpu1_sem_status == SEM_LOCK_SUCCESSFUL)
 
 cpu2_sem_status = (SemStatus_t)LL_HSEM_1StepLock(HSEM, CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID);
 if(cpu2_sem_status == SEM_LOCK_SUCCESSFUL)

Best Regards

Jonny

[Christophe Arnal]

Hello,

It is required 25ms of RF idle time to be able to erase the flash. I believe in your current setup, this is never the case and the CPU2 is blocking the flash processing.

You may use the debug GPIO in app_debug.c and check the GPIO named PES. GPIO PES is driving high by CPU2 when write/erase is blocked and low when write/erase is allowed.

Regards.