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STM32WB55 - BLE + standby mode. How to avoid the soft_reset after out from standby mode?

Almor
Associate

Hi, ST team!

My customer uses STM32WB55 in their development and recently he faced with following issue.

When the WB into the standby - OK. After out from standby mode all peripherals need repetitive initialization (processes, clocks, memory etc.), but CPU2 is already in work mode (C2DS=0 and CRPF=1) and doesn't completely communicate with CPU1 (into the interrupt IPCC_C1_RX_IRQHandler doesn't in).

We have been found the solution of this issue on ST community. There is a soft reset as I mentioned.

Could you please to advice how to avoid soft reset?

Thanks in advance!

1 ACCEPTED SOLUTION

Accepted Solutions
Martin HUBIK
Associate III

Hello,

C2DS bit is reset out of standby even though CPU2 is still in CSTOP (it did not boot). In other words, the value is not correct after waking up from Standby.

After power on, the CM0+ is started by setting C2BOOT. After wake-up from Standby this doesn't have the same effect. Instead an event must be generated towards CM0+ event input. In the BLE examples you will following code which is doing both. See for example 

STM32Cube_FW_WB_V1.8.0\Projects\P-NUCLEO-WB55.Nucleo\Applications\BLE\BLE_Peripheral_Lite\Src\hw_ipcc.c

void HW_IPCC_Enable( void )

{

 /**

  * When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2

  */

 LL_C2_EXTI_EnableEvent_32_63( LL_EXTI_LINE_41 );

 LL_EXTI_EnableRisingTrig_32_63( LL_EXTI_LINE_41 );

 __SEV( );    /* Set the internal event flag and send an event to the CPU2 */

 __WFE( );    /* Clear the internal event flag */

 LL_PWR_EnableBootC2( );

 return;

}

Best regards,

Martin

View solution in original post

2 REPLIES 2
Martin HUBIK
Associate III

Hello,

C2DS bit is reset out of standby even though CPU2 is still in CSTOP (it did not boot). In other words, the value is not correct after waking up from Standby.

After power on, the CM0+ is started by setting C2BOOT. After wake-up from Standby this doesn't have the same effect. Instead an event must be generated towards CM0+ event input. In the BLE examples you will following code which is doing both. See for example 

STM32Cube_FW_WB_V1.8.0\Projects\P-NUCLEO-WB55.Nucleo\Applications\BLE\BLE_Peripheral_Lite\Src\hw_ipcc.c

void HW_IPCC_Enable( void )

{

 /**

  * When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2

  */

 LL_C2_EXTI_EnableEvent_32_63( LL_EXTI_LINE_41 );

 LL_EXTI_EnableRisingTrig_32_63( LL_EXTI_LINE_41 );

 __SEV( );    /* Set the internal event flag and send an event to the CPU2 */

 __WFE( );    /* Clear the internal event flag */

 LL_PWR_EnableBootC2( );

 return;

}

Best regards,

Martin

Almor
Associate

Hello, Martin!

Thanks a lot for your time.

Your advice helped to solve our issue.

Best regards,

Aleksandr