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SMPS - Danger the device may be destroyed

Associate III

Hi all,

I read this advertising in the datasheet:


The SMPS needs a clock to be functional. If for any reason this clock stops, the device may

be destroyed.


Danger: Before enabling the SMPS, the SMPS clock detection must be enabled in the sub-GHz radio SUBGHZ_SMPSC0R.CLKDE.


I only found references to SUBGHZ_SMPSC0R in:

  • STM32Cube_FW_WL_V1.0.0\Middlewares\Third_Party\SubGHz_Phy\stm32_radio_driver\radio_driver.h

#define SUBGHZ_SMPSC0R 0x0916

  • STM32Cube_FW_WL_V1.0.0\Projects\NUCLEO-WL55JC\Examples\PWR\PWR_SMPS\Src\main.c

Use example

In the Datasheet:


The LDO or SMPS step-down converter operating mode can be configured by one of the


• by the MCU using the SMPSEN setting in PWR control register 5 (PWR_CR5), that

depends upon the MCU system operating mode (Run, Stop, Standby or Shutdown).

• by the sub-GHz radio using SetRegulatorMode() command and the sub-GHz radio

operating mode (Sleep, Calibrate, Standby, Standby with HSE32 or Active).

After any POR and NRST reset, the LDO mode is selected. The SMPS selection has priority

over LDO selection.


I don´t find any reference about "SetRegulatorMode()"

In the Reference Manual:


PWR control register 5 (PWR_CR5) --> Reset value: 0x0000 0000

Bit 15 SMPSEN: SMPS step-down converter enable

This bit enables the SMPS step-down converter.

0: SMPS step-down converter SMPS mode disabled (LDO mode enabled)

1: SMPS step-down converter SMPS mode enabled

Caution: Before enabling the SMPS, the SMPS clock detection must be enabled in the subGHz radio SUBGHZ_SMPSC0R.CLKDE.

Bit 14 RFEOLEN: sub-GHz radio end-of-life detector enable

0: Radio end-of-life detector disabled

1: Radio end-of-life detector enabled

Bits 13:0 Reserved, must be kept at reset value.


In the radio_driver.h code:


/*Sub-GHz radio SMPS control 0 register */

#define SUBGHZ_SMPSC0R 0x0916


/*Sub-GHz radio SMPS control 2 register */

#define SUBGHZ_SMPSC2R 0x0923


The SUBGHZ_SMPSC2R registers is used by:

static void Radio_SMPS_Set(uint8_t level)

If I use Applications\LoRaWAN\LoRaWAN_End_Node in the Nucleo-WL55JC1

Is SMPS enabled by the LoRa radio Driver?

Do I have to worry about this "device may be destroyed" warning?

Do I have to implement clock detection?

Best Regards


Associate III

This is a ST Advertising... Nothing to comment about it?

Associate III


In this application note:

I read that SMPS is also named DCDC


And searching DCDC in the End_Node source code I found:

int32_t RBI_IsDCDC(void)
#if defined(USE_BSP_DRIVER)
  /* Important note: BSP code is board dependent
   * STM32WL_Nucleo code can be found
   *       either in STM32CubeWL package under Drivers/BSP/STM32WLxx_Nucleo/
   *       or at
   * 1/ For User boards, the BSP/STM32WLxx_Nucleo/ directory can be copied and replaced in the project. The copy must then be updated depending:
   *       on board RF switch configuration (pin control, number of port etc)
   *       on TCXO configuration
   *       on DC/DC configuration */
  return BSP_RADIO_IsDCDC();
  /* 2/ Or implement RBI_IsDCDC here */
  int32_t retcode = IS_DCDC_SUPPORTED;
#warning user to provide its board code or to call his board driver functions
  return retcode;
#endif  /* USE_BSP_DRIVER  */
  * @brief  Get If DCDC is to be present on board
  * @note   never remove called by MW,
  * @retval
int32_t BSP_RADIO_IsDCDC(void)
static void RadioInit( RadioEvents_t *events )
    RadioEvents = events;
    SubgRf.RxContinuous = false;
    SubgRf.TxTimeout = 0;
    SubgRf.RxTimeout = 0;
    SUBGRF_Init( RadioOnDioIrq );
    /*SubgRf.publicNetwork set to false*/
    RadioSetPublicNetwork( false );
    SUBGRF_SetRegulatorMode(  );
void SUBGRF_SetRegulatorMode( void )
    /* ST_WORKAROUND_BEGIN: Get RegulatorMode value from RBI */
    RadioRegulatorMode_t mode;
    if ( ( 1UL == RBI_IsDCDC() ) && ( 1UL == DCDC_ENABLE ) )
        mode = USE_DCDC ;
        mode = USE_LDO ;
    SUBGRF_WriteCommand( RADIO_SET_REGULATORMODE, ( uint8_t* )&mode, 1 );

So, I think in the End_Node Code, with the Nucleo-WL55 Board the SMPS is used but I don´t found any code to Enable Clock Detection like this used in PWR_SMPS example:

  * @brief SMPS clock detection enable.
  * @note  SMPS clock detection is recommended to be enabled before enable SMPS
  *        in switching mode. 
  *        In case of clock failure, it will automaticcaly switch off SMPS
  *        (refer to reference manual).
  * @note  SMPS clock detection is controlled through HAL SUBGHZ peripheral,
  *        due to SMPS and radio related to the same HSE clock.
  * @param None
  * @retval None
void SMPSClockDetectionEnable(void)
  uint8_t radio_register_data;
  uint8_t radio_register_data_readback;
  uint8_t radio_command;
  /* Enable SMPS clock detection through HAL SUBGHZ peripheral */
  HAL_SUBGHZ_ReadRegister(&hsubghz, SUBGHZ_SMPSC0R, &radio_register_data);
  radio_register_data |= SUBGHZ_SMPSC0R_CLKDE;
  HAL_SUBGHZ_WriteRegister(&hsubghz, SUBGHZ_SMPSC0R, radio_register_data);
  /* Check back data written */
  HAL_SUBGHZ_ReadRegister(&hsubghz, SUBGHZ_SMPSC0R, &radio_register_data_readback);
  if(radio_register_data != radio_register_data_readback)
  /* Set back radio in Sleep mode (optional) */
  /* Note: Once clock detection is enabled the radio can be put back in Sleep mode,
           clock detection remains active.
           SMPS can still be controlled through PWR registers */
  /* Note: Using radio middleware, this action can be done more easily 
           with function "RadioSleep()" */
  radio_command = 4; /* Command "Set_Sleep": warm startup and RTC wakeup disabled is value 4 */
  HAL_SUBGHZ_ExecSetCmd( &hsubghz, RADIO_SET_SLEEP, ( uint8_t* )&radio_command, 1 );


Should I call this function at the beginning of the End_Node application?

Best Regards,


Any updates on this?

Associate III

What I did was to modify the RBI_IsDCDC function. This function is called just before enabling the SMPS so I figured it was a good spot.

int32_t RBI_IsDCDC(void) {
    int32_t retcode = IS_DCDC_SUPPORTED;
    // turn on SMPS clock detection
    SUBGRF_WriteRegister( SUBGHZ_SMPSC0R, 1 << 6);
    // now I can turn on the SMPS
    return retcode;

This is a pretty old thread. Maybe someone from ST will comment if this isn't a good idea.

Associate II

Are there any updates on this?

I have a batch of 120 devices, and about 20 of them have trouble with SMPS. It can not be enabled, probably thanks to clock detection. 

Is there something I could check to find the root issue?



Hi Konstantin, did you get to the bottom of this and get your remaining 20 modules working? I think I have a similar issue, please let me know if you got them working again?

DWalk.3, the RM states that SUBGHZ_SMPSC0R reserved bits must be kept at reset value, so your code in function RBI_IsDCDC(void) should be something like this:

uint8_t register_read = 0; register_read = SUBGRF_ReadRegister(SUBGHZ_SMPSC0R);
register_read |= SMPS_CLK_DET_ENABLE; // 1 << 6
SUBGRF_WriteRegister(SUBGHZ_SMPSC0R, register_read);


Associate III

Is this forum really dead?!

Some forum member asks a pertinent question about a warning issued by STM about one (some) of their product(s) and over TWO YEARS later nobody answered! In top of that, other members join the monologue with issues that seem related to the OP's one, this giving it more weight. Their questions remain unanswered as well. I understand other members might not be interested in the subject, or might not have any experience on the matter. That's fine. But aren't any moderators, technical people from company's side around? After all the question was related to one of their 'advertisements '...

Hey, don't mind me! I'm just a bystander. Mind these people reporting issues and asking justified questions! Big or small, they are your customers!

And how you treat them tells a lot not about them, but about who you are as a company. To me, at least, more than any shiny advertisements you pay big money for!

I was unable to prove the issue is related to SMPS clock. And I doubt it.

At least the code i wrote does a tripple check for the SMPS clock detection is enabled before switching SPMS on. But still MCUs sometimes passing out.

And there is no way to repair the dead MCU. Soldering an another one usually resolves the trouble, but sometimes a new MCU hops on with its predecessor on the road to recycle bin :(

I believe my issue is VDD being on the edge of allowed range and maybe occasional spikes could damage the radio part