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Problem with LoRaWAN and DAC in the same time.

MRebo.1
Associate II

Hi guys. When I program the device with LoRaWAN and DAC with pin extern (PA10), I saw in oscilloscope that DAC stay high every when has uplink. Like the image:

0693W00000BcMkHQAV.jpg 

Does anyone have any idea why this happens? Thanks!

5 REPLIES 5

Perhaps some issue with the grounding? Any obvious shorts or points of connectivity?

Is this some custom board? Is there are schematic for it?

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I use the DAC for the COMP. The DAC Pin is not connected to anything, I just keep measuring it to see the behavior of my firmware... I can't send the schematic :(

It seems that the problem is when LoRaWAN uses SPI, I'm thinking... Because when device uses NSS pin, the problem appears

Perhaps you can check the GPIO peripheral register settings to make sure there isn't something else configuring/conflicting with your design's implementation.

What am I looking at on the scope? PA10? Nominally ground, with 40mV of periodic noise, then 100mV of offset with 100mV of periodic noise (at DAC rate) on that?

So 200mV of peak noise on a pin you've not configured, and not using?

Doing odd things with VREF+ / VDDA ?

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I found some forums saying that on the STM32WL chip the pins shared by the SPI, when used at the same time has conflict. Example:

It has an external interrupt pin that was shared with an SPI pin. When using SPI, it generated interrupt...

In my case, I was using the DAC pin just to see the behavior, but this PA10 pin is open, with nothing connected to it. In my code I already took it out and I'm using only the internal DAC (which my application needs).

But this problem is very curious... I don't know how to solve it if I need to use a pin shared with SPI.