2024-10-09 01:07 AM - edited 2024-10-09 01:08 AM
Hello everyone.
I am currently trying to implement the application “Phy_802_15_4_Cli” from the STM32Cube repository in Zephyr. We are using a STM32WB55RG. Unlike in the standard application, we use the PLL as SYSCLOCK, the input clock is HSE (32MHz). As CLI (command line interface) we use LPUART. The aim is to use the PC app STM32CubeMonitor-RF with the "Phy_802_15_4_Cli" app on the STM32WB55, which has already worked so far. However, the problem is that in RX mode, as soon as the first 802.15.4 packet is received, the C2DS bit is set in the PWR_EXTSCR register --> “CPU2 is in deepsleep or hold by C2BOOT”. This causes the SW and SWS bits in the RCC_CFGR register to be set from 11 (PLL as system clock) to 10 (HSE as system clock). The output via LPUART then only produces garbage. One way to prevent the low power mode of the C2, e.g. using `SHCI_C2_RADIO_AllowLowPower()` only works with BLE, Thread or Zigbee, but not for the LLD_Tests. Another attempt was to check the SYSCLOCK within the RX callback each time and reset it to PLL if it is not already.
if(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {
/* Set PLL as System Clock Source */
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {
}
}
This only works partially, but reduces the garbage in the output. Does anyone have any idea how I can prevent this clock switch?
2024-10-16 07:07 AM
Hello @Silvio_R, welcome to ST Community,
Try reinitializing the CPU2 after it wakes up from low power mode. This can help ensure that the clock configuration is restored correctly.
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2024-10-17 06:55 AM
Hi Sarra, thank you very much for your reply.
Reinitializing the CPU2 may help, but I may need to explain more clearly when the C2 goes into low power mode why a reinit cannot be the solution.
With the Phy_802_15_4_Cli app and the stm32wb5x_Phy_802_15_4_fw.bin as wireless stack on the C2, you can use the command “RX_start 1” to start continuous reception of 802.15.4 messages. Option 1 specifies that the frame and receive information should be printed. After the first frame has been received, the C2 goes into low power mode, wakes up when the next frame has been received and then goes back into low power mode. During this time, the clock switch takes place. So, a reinit cannot therefore take place while the C2 is or should be ready to receive, as otherwise the command would have to be entered again.
I'm just wondering why this happens with this wireless stack. (???) With others like the stm32wb5x_Mac_802_15_4_fw.bin this does not happen during frame reception either.