How to correct the frequency deviation caused by replacing the oscillator of STM32WL

[Weili]

Dear ST,
Our customers have encountered some problems when using STM32WL in FSK mode. We read the document es0500-stm32wl55xx-stm32wl54xx-device-errata-stmicroelectronics.pdf. There is a suggestion to replace the 32Mhz HSE with 31.25Mhz, but we are changing it. After that, I did a CW wave test and found that the frequency shifted by about 20Mhz. How can we correct this problem? Thank you.

[STTwo-32]

Hello @Weili and welcome to the ST Community.

I suggest you to follow the workaround mentionned on the ES0500 that advice you to use HSI or MSI with or without PLL as a clock source (without any modification on the HSE).

Best regards.

STTwo-32 

[Weili]

Hello @STTwo-32 

Thank you for your quick response.

I saw a workaround in the ES0500 file, but I'm sorry, I don't quite understand it. Do I need to make changes in cubeMX? Can you instruct me where to change it?
I need to know before I resolve it with my customer.

"Workaround
Use a different clock source for the system, for example MSI or HSI with or without PLL"

[STTwo-32]

Hi @Weili 

In your .ioc file, change the clock source you are using to MSI or HSI. Than using PLL, you Can configure your system clock to the value that you want.

Take a look at the clock tree on the reference manual of your board to have more détails.

Best regards.

STTwo-32 

[Tesla DeLorean]

I think someone is missing the point here.

If HSE frequency is changed, defines like HSE_VALUE need to track that, and whatever is doing the computation for the carrier frequency of the FSK/LoRa radio, so they are based from 31.25 MHz, not 32 MHz.

Identify THAT code or defines.

Perhaps more helpfully explain the underlying issue. Is there some cross-correlation issue when you integrate the previous two ICs into a single die? ie all the CMOS switching currents are disruptive of the I/F band, or correlators, due to the synchronous nature of the clocks, rather than two clocks which will inevitably diverge and have different beat frequencies which are easier to ignore, or generally less disruptive on a continuous basis?

[Tesla DeLorean · Accepted solution]

I'm suspicious it means using TWO independent clocks. Where the HSE and TCXO clocks are different/independent sources, and you're not feeding the HSE back in as the TCXO source to the radio.

This should be stated clearly, if the case, the errata is opaque and ambiguous. Be CLEAR as to what the errata needs addressing.

From radio_driver.c

/**
  * @brief Provides the frequency of the chip running on the radio and the frequency step
  * @remark These defines are used for computing the frequency divider to set the RF frequency
  * @note XTAL_FREQ can be redefined in radio_conf.h
  */
#ifndef XTAL_FREQ
#define XTAL_FREQ                   ( 32000000UL )
#endif /* XTAL_FREQ */

#define SX_FREQ_TO_CHANNEL( channel, freq )                                  \
do                                                                           \
{                                                                            \
  channel = (uint32_t) ((((uint64_t) freq)<<25)/(XTAL_FREQ) );               \
}while( 0 )

[Weili]

Hi Tesla.

Thanks for your reply.

Thank you for your information. Your information has successfully helped us solve this problem.

B.R. Weili Wang.