Why is timer15 missing around 7% of the internal events?

[mp035]

Posted on January 09, 2018 at 08:34

Hi, I have a project with

• ADC clocked from timer3 using TRG0 on update
• DMA connected to ADC with interrupt every 200 samples (ping pong style with 400 sample buffer).
• Timer15 set to clock from timer3 TRG0

The beginning line of the interrupt routine is:

void DMA1_Channel1_IRQHandler(void) {      cntreg1[cntcnt] = TIM15->CNT;      cntreg2[cntcnt++] = DMA1_Channel1->CNDTR;       if (cntcnt == 255)      {           while(1); // BREAKPOINT SET HERE      }

         // CLEAR interrupt flags etc. and return below.

When I Examine cntreg2 it has the expected values (200,400,200,400,200,400 etc. etc.)

But when I examine cntreg1 it seems to be missing some of the events.  Actual Values: 175, 347, 523, 712, 911, 1111, 1311, 1510, 1697, 1874, 2054, 2245......

I expect to see 200, 400, 600, 800, 1000, 1200, 1400, etc.

I have tried stopping timer 3 as a test, and timer15 stops counting also, so I think it is safe to assume that I am definitely counting timer3 events.

Has anyone experienced anything like this before? Any ideas why some events are getting missed?

[waclawek.jan]

Posted on January 09, 2018 at 12:55

Isn't the ADC set to run in some sort of autonomous mode?

JW

[Tesla DeLorean]

Posted on January 09, 2018 at 14:33

Which part are you using?

How fast is TIM3 ticking?

Does DMA use FIFO mode?

[mp035]

Posted on January 10, 2018 at 00:46

Thanks for the reply.  Part is STM32F030C8T6  Tim3 is ticking at 100Khz, DMA does not use FIFO mode.

[mp035 · Accepted solution]

Posted on January 10, 2018 at 04:02

Thanks for the replies, I have solved the issue.  I had my ADC sampling time set such that the max ADC sample/conversion rate was 102.9Khz calculated against a 14Mhz ADC clock.  I had not accounted for any inaccuracies in the ADC oscillator.  With Timer3 clocking the adc at 100Ksps, this sometimes caused the ADC to miss some triggers.   Reducing the sampling time so that there was more margin between the maximum possible ADC conversion rate, and the actual trigger rate solved the problem.