What SDIO interface chip (with a 3.3V host side) are people using these days? The IP4856CX25 (used on the H7 Eval board) is NRND.

[chriscole]

What SDIO interface chip (with a 3.3V host side) are people using these days? The IP4856CX25 (used on the H7 Eval board) is NRND, and I can't seem to find an SDIO interface chip that supports a 3.3V host side. What part should I use for a 3.3V H7 design?

[Tesla DeLorean]

Are you using cards with low-voltage Ultra / DDR modes that need this, or would significantly benefit from doing so?

Pretty sure you could build something equivalent to the IP4856CX25 with 74-series type parts of current vintage, or not-automatic level shifter solutions. Size would obviously be bigger than the MCM they went with initially.

Check your SDMMC driver adequately handles the modes, and failure/fall back when the combinations don't work.

[chriscole]

Yea, I need to support SDR104. We're logging a lot of data, sampling 72 channels at 15 kHz (I'm muxing the ADC inputs). All of this data is laid onto the SD card, and being retrieved over High-Speed USB some time later.

I did find this chip, which looks good electrically, but is a 0.4 mm pitch WLCSP, so I'd really like to avoid using it (drives up PCB and assembly cost):

https://www.mouser.ca/datasheet/2/916/IP4856CX25_C-1320220.pdf

I'd have to imagine that ST has a solution in their back packet for this issue? (Issue being that the H7 Eval design cannot be realized).

Any other ideas would be great!

Thanks,

-Chris

[Tesla DeLorean]

Isn't that materially the same part?

>>Issue being that the H7 Eval design cannot be realized

Most people aren't trying to build a board that expensive, most just cherry-pick the pieces of interest, and ST has indicated they are likely to migrate away from theses type of kitchen-sink boards with I2C IO Expanders because the pins ran out.

Does it need to be an SD Card? or could you use an eMMC which doesn't need to change voltage, and can do 8-bit wide transfers.

What kind of sustained Write speeds have you seen with SDR104 on the H7-EVAL ?

[chriscole]

My bad, yes,that is the same part, which we cannot use as it is NRND.

So, how are people using the SDIO interface on the STM32 MCUs (since I believe that interface is a static voltage, VDD)? Is everyone home-brewing a voltage translation interface using something like a TXS0108 or an NXB0108?

Thanks,

-Chris

[chriscole]

My current plan is to utilize a TXS0206: https://www.ti.com/lit/ds/symlink/txs0206.pdf

And I'll add a voltage regulator to VCCB that I can manually switch from the MCU via SD_LDO_SEL.

-Chris

[Forent]

Hi Chriscole

We face exactly same proble, we would like to use Sd card at maximum speed possible.

Do you have good result with TXS0206?

But according I see it need also 0.4 mm pitch, so look like there is no solution with reasonable pitch?

[chriscole]

When we built the last spin of our board, we were unable to find any TXS0206 parts (or anything similar), so I removed the TXS0206 from the design, and I drive the SD Card interface directly from the STM32H7. I am not 100% sure we needed SDR104 now, and SD50 might be fast enough for us. Our software team has not yet needed the SD Card feature yet, but we will evaluate this aspect of our solution down the road. I'm still very unsure about using the STM32H7 with SDR104. It does not seem possible to me.

[Tesla DeLorean]

In my view you run into the limits of the STM32 implementation, and available bandwidth long before you do those of the cards.

The cards often have depressing low write speeds, and certainly asymmetrical with the reads. Also MCU are poor clients, they have little memory, definitely less than the erase block sizes on the underlying NAND, and often very poor file system and caching implementation. Your average MPU implementation with a real OS has deep caching, and a lazy write algorithm so you're not churning blocks.

In my view you should be able to get in the the mid 30's MBps for reads without any voltage nonsense. The MicroSD spec should allow for 50 MHz clocking for the pre-HD/XD cards.

The high bandwidth tests I did weren't tasked with actual data generation, so the DMA was unconflicted. The practicalities of doing any work with the data need to be considered.

You must use DMA, the POLLED code fails when the cards are particularly capable of sink/sourcing data.

[Forent]

OK thanks Both for your quick feedback!

Our application is manly as read, so we will have a look.

With many cycle: read data, process data, output data

With software we can imagine some prefecthing system with DMA, during we process data of the previous cycle, that can give better global optimization , than sdcard speed.

(for our first prototype we will try to check impact SD50 vs SDR104, before commercial application)