What is the precise sequence of QW, BSY and interrupts during flash programming?

[RNiel.15]

After reading the section about Flash in RM0433 I am till a bit in doubt of the sequence of events during flash programming.

This is important because I need to know that certain write operations are complete (such that the update is reflected even if the device is reset or power is lost at that point) before starting other write operations.

According to my understanding, I start by setting the PG flag in the FLASH_CR of the bank that is to be programmed, then I write 32 bytes starting at a 32-byte-aligned address.

After this, the QW flag should go high and when it goes low, I can start another write operation (Question 1: does this mean the physical write has begun or that it is complete?). Question 2: What role does the BSY flag have (is it obsolete or does it mean that physical write is ongoing or ...)?

Question 3: If I enabled interrupts, "End of programming" will be invoked at some time, but when (when QW goes low or when the physical operation is complete or ...)?

[TDK · Accepted solution]

There is a buffer involved which makes things complicated, but the RM is pretty clear about the recommended approach.

The write is complete when QW is low. Data is written and will be retained on power loss at that point. When QW is high, it's either waiting for more data or the operation is ongoing.

BSY goes high when the operation is actively ongoing, but so is QW, so you don't need it. Older families did not have a buffer or a QW bit, so this was the only flag you needed. Not so in the H7.

EOP flag is set after programming is done, so QW will be low.

[RNiel.15]

Thank you, that clarified my doubts :)