What is the least CPU intensive way to access the I2C bus?

[BCrow.1]

I have tried using the HAL_I2C_Master_Transmit_DMA and HAL_I2C_Master_Receive_DMA functions to access an external I2C slave but I find that this takes a fair amount of processing time. I am using a STM32L476R M4 core device. Using a GPIO I measure the processing time for a single access to be around 18 us with a 72 MHz system clock. This seems quite a long time and is an issue for my system. Is there a quicker way to access the I2C bus than this. I would have expected using DMA would be about the least CPU intensive way to do it.

Thanks

[Tesla DeLorean]

Well the I2C bus isn't particularly fast, and DMA has reasonably significant overhead for set up, interrupts, etc. If doing a handful of bytes probably not worth the circus.

The least CPU intensive way would likely be to have a state-machine managing queued I2C transactions, advanced by I2C IRQ's

[Tesla DeLorean]

27-bits on a 400 KHz bus, would be like 67.5 us, a single byte 22.5 us

[BCrow.1]

Thanks for the state machine thought. That might be something to look into for my system. It's not the I2C bus time itself that I am worried about. I was hoping that the DMA mode of operation would allow me to set up an access and then just go off and do other tasks until the interrupt fires and my data is ready. I am sampling the I2C data at a much slower rate than other tasks, so there is time for the access to occur as long as the CPU doesn't have to be too involved. I will experiment with other ways to do these accesses.

Thanks

Brad

[berendi]

First, don't use HAL functions, only the register interface.

The least CPU intensive way might be using neither interrupts nor DMA, just poll the status registers in the main loop and advance the state machine accordingly.

Even the simplest interrupt handler takes some time to start up and return, and there is the added complexity of ensuring that no variable is accessed at the wrong time (which is completely ignored by HAL functions, leading to all kinds of race conditions when using interrupts or DMA with HAL).