2020-06-11 07:27 AM
I know its clock is provided from the APB1, but I can't figure out how to calculate and what are the relations between fdcan_ker_ck and fdcan_pclk
2020-06-11 09:41 AM
Ok guys, I figured it out.
fdcan_ker_clk is associated with PLL1Q (you can choose this by this command):
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit;
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
RCC_PeriphClkInit.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL;
The PLL1Q is given by = PLLclocksource * DIVN1 / (DIVM1 * DIVQ1)
For a HSE oscillator running at 8 MHz
Choosing DIVN1=400
DIVM1 = 4
DIVQ1 = 40
we will get that FDCAN clock is 20 MHz
Hope this helps