What is the default operation of OSC_IN & OSC_OUT for the 32L0x2?

[CMore.3]

Here's my issue: in converting an STM32L072 QFN32 to BGA49 I routed the NRST line across the PH0 & PH1 balls to avoid using via-in-pads. However, it appears that in a virgin part HSE is enabled by default and OSC_OUT is pulling the NRST line low, which prevents programming the part. Is this a correct analysis?

I have yet to see a clear explanation of the default behavior of HSEON. The RCC_CR register power-on default says it should be off but I think it must not be.

[TDK]

The as-reset behavior is outline in the reference manual. The chip is always clocked from the internal HSI MSI after reset, not from HSE.

Per the reference manual, the HSE is off after reset and the PH0/PH1 pins can be used as normal GPIO. Per the reference manual, they are configured in high-impedance analog mode after reset (see MODER register). They are not driving NRST low. Look elsewhere for the answer to your issue.

[waclawek.jan]

Default bootloader, if used, may switch HSE on (for USB/CAN). Read AN2606 if this is the case.

JW

[Andrew Neil]

Also in the Datasheet:

[CMore.3]

Thanks, I had not read that AN. It appears that the 'L072 does not do this.

[CMore.3]

Yep, I agree, everything I read says the pins should be GPIO. My NRST line runs from a Tag-Connect, through the PH0 & PH1 pins, to the NRST pin. With the usual 100n cap attached. With no power to the chip I get an open circuit between NRST & ground, when I power the chip I get a short from NRST to ground. With nothing else to possibly blame I have to assume that something is behaving differently than what's in the data sheet.

I was hoping someone would know of an exception (such as what waclawek.jan suggested) that would explain what I see. I'm going to make a PCB change to fix it but mgmt likes to have a solid explanation for what happened.