2023-01-04 11:06 PM
2023-01-05 12:21 AM
This is explained in the smbus specification.
2023-01-06 07:57 PM
Well, from the previous century, spi 4 wires evolved to 3 wires (bidir data), then I2C to blend NSS in 2 wires and use mostly 7 bit sub address to replace multiple NSS for multiple slave devices. And when I2C multimaster was starting to make the buzz, USB came into play...
2023-01-07 12:56 AM
SMBUS evolved from I2C.
I2C specification is maintaned by NXP (as Philips's successor), but they are corporately dumb enough so they can't properly publish it. OTOH, they surprisingly still maintain it, so the latest Rev.7 is dated Oct.2021 and includes a section with introduction and comparison to MIPI I3C.
They also renamed master/slave to controller/target...
https://community.nxp.com/t5/NXP-Designs/I2C-bus-specification-and-user-manual-UM10204-Is-it-still/m-p/1364711 -> https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/nxp-designs/931/1/UM10204.pdf
JW