What could cause a STM32F427 to hard fault when GPIO port is set to output
I just received version 2 of a board I designed. It has two STM32F427 on it. One a 144 pin used for main processing and the second a 100 pin used to control IO.
The 100 pin MCU uses Ports B, D, E (all as outputs) to control outputs.
Version 2 of the board is all hand assembled and soldered by an assembly house in China.
I've had firmware running on Version 1 for weeks so I know the software is not causing the hard fault.
The board is drawing about 200 ma more than it should which would indicate an issue somewhere.
I debug the operation of the 100 pin MCU (output ports) to jump to the hard fault vector when any of the pins associated with ports B, D, E are set to being an output.
I've looked hard at the board and parts under a microscope and do not see any solder bridges.
I do see a lot (about .25v) of noise/hi freq oscillation on both VCAP pins. The voltage is clean on the VCAP pins of the 144 pin CPU.
What would noise or oscillation on either of the VCAP pins suggest as being an issue?
Both caps are 10UF 6.3v Low ESR caps.
What GPIO related event would cause a hard fault?
Any ideas or suggestions as to what the issue may be is welcomed.
Thanks.
Joe
