2025-01-28 07:21 PM
Greetings of the day!
I am using the controller STM32G491MCT for one of my development project. It is given in the datasheet that the VIL of the FT pin is 0.25*VDD & 0.3*VDD. My input signal fall within the range of 0.753V to 3.83V.
Considering the worst case 0.25*3.3 which is 0.825V. When estimating noise margin, 0.825-0.753 equals 0.072mV.
Could someone clarify whether the 72mV is sufficient to pull the logic low?
Anticipating the earliest response.
Thanks & Regards
Mahalakshmi S
Solved! Go to Solution.
2025-01-29 01:15 AM
Dear Mahalakshmisudhakar
The FT_xx pins (except FT_c) have VIL threshold 0.3xVDD (standard guaranteed) but the exact design level is 0.39xVDD-0.06V.
For the FT_c pins is the VIL level (in dependency from VDD used):
for 2.7 V < VDD < 3.6 V : VIL < 0.3xVDD
for 1.62 V < VDD < 2.7 V : VIL < 0.25xVDD
If your VDD is 3.3V then you can calculate with VIL < 0.3xVDD . This value is quite safe (VIL<1V) for your low level input signal (0.752V).
There are missing conditions (in the datasheet) for the two levels of VIL for FT_c pins (as written above) - this will be corrected in new datasheet revision (already detected this mistake).
Regards
Igor
2025-01-29 01:15 AM
Dear Mahalakshmisudhakar
The FT_xx pins (except FT_c) have VIL threshold 0.3xVDD (standard guaranteed) but the exact design level is 0.39xVDD-0.06V.
For the FT_c pins is the VIL level (in dependency from VDD used):
for 2.7 V < VDD < 3.6 V : VIL < 0.3xVDD
for 1.62 V < VDD < 2.7 V : VIL < 0.25xVDD
If your VDD is 3.3V then you can calculate with VIL < 0.3xVDD . This value is quite safe (VIL<1V) for your low level input signal (0.752V).
There are missing conditions (in the datasheet) for the two levels of VIL for FT_c pins (as written above) - this will be corrected in new datasheet revision (already detected this mistake).
Regards
Igor
2025-01-29 01:39 AM