USART in SPI mode

[EE_CV]

Is it possible to configure the USART as SPI master, with SPI slave having 16 bit data frames (AD5592R) ?

[Tesla DeLorean]

I don't see that working

[EE_CV]

Is that because the USART in SPI mode only support 8-bit data?

[Tesla DeLorean]

Well arguably it can deal with 9 bits and some stop/start configurations, but I don't see a winning move here in terms of generating usable signalling. I'm lacking scope/context.

Why can't you use an SPI peripheral? Which STM32 part are we talking about?

Are you trying to send data, receive, or combination of both? At what speed?

[EE_CV]

We connected the SPI slave device to USART because the we did not want to share the 2 SPI available peripherals, since they were used for a critical SPI device and a I2S device on the SPI pins. We are talking about STM32F405. We are now considering GPIO emulation and looking into how fast that can be without choking the CPU.

[EE_CV]

Some more info about the SPI emulation, our board does not have the SCK connected to a timer pin unfortunately, so it does not meet the requirements of AN4678.

[S.Ma]

If one SPI is used as master and you need another one, you could use alternate GPIOs and dynamically (and time multiplex) its use. Otherwise, was told USART can be a slower speed version of SPI Master with CK output pin. SPI by SW emulation using GPIOs in push-pull mode (if 4 wires configuration) can give you few MHz frequency raw.

[EE_CV]

Yeah we will probably try GPIOs in push-pull mode and see how that works out. Without a timer connected to the USART clock it's not clear to me if there is any advantage configuring the USART peripheral at all. 1MHz raw is fine for us as long as it doesn't tie up the CPU for too long, which remains to be checked. At the very fastest we need to communicate with the SPI slave every 3ms.

[waclawek.jan]

Isn't 16 bit = 2 x 8 bits?

What's the issue? I presume you are talking about the synchronous mode of USART. Is the peripheral in question picky about clocks being continuous?

https://community.st.com/s/feed/0D50X00009bLS7GSAW

JW

[EE_CV]

Yes I am looking at synchronous USART used as SPI master. Would the USART insert a stop and start bit between each 8 bits in that mode? If so wouldn't that mess up the slave?