Unexpected Gain in OPAMP_PGA in G431

[HDaji.1]

I am testing Examples/OPAMP/OPAMP_PGA/ in G4 package code, only to find the gain is not consistent as showed below:

The OPAMP input values are 0.01,0.03, ..., 0.15, and gain is 16.

However, I measured output at ADC side, the gain drops significant as input values increase.

What went wrong?

[HDaji.1]

Hi Igor,

thank you very much for your effort. Much appreciate it.

In fact, my test setup is a bit complicated: I use a G4 board SPI to control a DAC board and adjust its voltage output, which is connected to the same G4 board's OPAMP input. I link OPAMP output to an ADC input channel. That's how I got the above weird result.

In the past days, I did another test: use one G4 board to control the DAC; use another G4 board's OPAMP+ADC just to read DAC output. The result looks reasonable except that when DAC output goes low as 10mV, gain is slightly higher than expected. I guess it may be caused by that OPAMP offset.

The weird result in my first attempt is caused by the test setup: too many wires.

I will try to reduce wiring as much as possible. Any other advice on how to do a decent setup for my complicated testbed?

One more question: have you tried to measure the OPAMP output using ADC input channel of the same chip or board? I wonder how big the ADC error can reach. My project requirement is to use OPAMP+ADC to read voltage in range 10~30mv, ADC reading error < 1mV after gain.

[Igor Cesko]

Hi HDaji.1 ,

This OPAMP - ADC configuration was tested. The ADC measures what is on OPAMP output (if correct minimum sampling time was applied). So the accuracy of voltage measurement is given by ADC parameters - as shown in datasheet.

This means : Total unadjusted error = 5.5LSB (datasheet data). If VREF=3.3V then 1LSB = 3.3/4095 = 0.8mV . So Total unadjusted error = 5.5 * 0.8mV = 4.4mV.

If we measure such low voltages then error will be much better - dominant is ADC offset error (gain error is not so important) then: offset error = 2.5LSB => 2mV.

Regards

Igor

[HDaji.1]

Hi Igor,

I also wanted to try DC voltage in RAM by modifying the Sinewave example.

I did two things: (1) for sinewave value array, I put same value for all; (2) I set the DAC trigger timer to be a large value.

However, DAC output voltage drops very fast. I wonder how to maintain the DAC output voltage level.

I enable DAC SampleandHold and use the longest value for sample and hold time. It still does not work.

Do you mind sending me your code? Thx.

[Igor Cesko]

Hi HDaji.1,

Do not use sample and hold mode for the DAC. Modify the example in the STM32CubeMX - this is the easiest way to modify the project (*.ioc file in the example is the file for STM32CubeMX). In STM32CubeMX change the DAC mode and build the example again.

Regards

Igor

[HDaji.1]

You mean this oneand this one

sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_DISABLE;

 BTW, I am using CubeIDE not CubeMX

[HDaji.1]

I used back the original OPAMP_PGA code, now the DAC output voltage is sustained. Thx.

[Igor Cesko]

Hi HDaji.1 ,

Mode should be "Connected to external pin only".

And "Sample And Hold" should be "Sampleandhold Disable" :

Regards

Igor

[HDaji.1]

Hi Igor,

Is there a way to calibrate OPAMP offset? I found even for the same gain, the offset values are different for my two experiments conducted at different times. That's annoying.

[HDaji.1]

Is there any way to adjust ADC error to 1LSB?

[Igor Cesko]

Hi HDaji.1 ,

Please disable "SampleandHold" mode to have stable DC value.

Regards

Igor