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two independent CAN

UVagl.1
Associate II

HI,
I'm working with a micro from the H7 family (H723).
I have to implement CAN communication on two distinct peripherals (FDCAN1 and FDCAN2) in interrupt mode but the system doesn't work.
Below are the settings I use in my project:

void MX_FDCAN2_Init(void)
{
  /*USER CODE BEGIN FDCAN2_Init 0 */
  /*USER CODE END FDCAN2_Init 0 */

  /*USER CODE BEGIN FDCAN2_Init 1 */
  /*USER CODE END FDCAN2_Init 1 */

  hfdcan2.Instance = FDCAN2;
  hfdcan2.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
  hfdcan2.Init.Mode = FDCAN_MODE_NORMAL;
  hfdcan2.Init.AutoRetransmission = DISABLE;
  hfdcan2.Init.TransmitPause = ENABLE;
  hfdcan2.Init.ProtocolException = DISABLE;
  hfdcan2.Init.NominalPrescaler = CAN_PRES;
  hfdcan2.Init.NominalSyncJumpWidth = CAN_SJW;
  hfdcan2.Init.NominalTimeSeg1 = CAN_T1;
  hfdcan2.Init.NominalTimeSeg2 = CAN_T2;
  hfdcan2.Init.DataPrescaler = CAN_DATA_PRES;
  hfdcan2.Init.DataSyncJumpWidth = CAN_DATA_SJW;
  hfdcan2.Init.DataTimeSeg1 = CAN_DATA_T1;
  hfdcan2.Init.DataTimeSeg2 = CAN_DATA_T2;
  hfdcan2.Init.MessageRAMOffset = 0;
  hfdcan2.Init.StdFiltersNbr = 1;
  hfdcan2.Init.ExtFiltersNbr = 0;
  hfdcan2.Init.RxFifo0ElmtsNbr = 5;
  hfdcan2.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
  hfdcan2.Init.RxFifo1ElmtsNbr = 2;
  hfdcan2.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
  hfdcan2.Init.RxBuffersNbr = 0;
  hfdcan2.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
  hfdcan2.Init.TxEventsNbr = 0;
  hfdcan2.Init.TxBuffersNbr = 0;
  hfdcan2.Init.TxFifoQueueElmtsNbr = 32;
  hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
  hfdcan2.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
  if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK) {
    Error_Handler();
  }

  void MX_FDCAN1_Init(void)
  {
    /*USER CODE BEGIN FDCAN1_Init 0 */
    /*USER CODE END FDCAN1_Init 0 */

    /*USER CODE BEGIN FDCAN1_Init 1 */
    /*USER CODE END FDCAN1_Init 1 */

    hfdcan1.Instance = FDCAN1;
    hfdcan1.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
    hfdcan1.Init.Mode = FDCAN_MODE_NORMAL;
    hfdcan1.Init.AutoRetransmission = DISABLE;
    hfdcan1.Init.TransmitPause = ENABLE;
    hfdcan1.Init.ProtocolException = DISABLE;
    hfdcan1.Init.NominalPrescaler = CAN_PRES;
    hfdcan1.Init.NominalSyncJumpWidth = CAN_SJW;
    hfdcan1.Init.NominalTimeSeg1 = CAN_T1;
    hfdcan1.Init.NominalTimeSeg2 = CAN_T2;
    hfdcan1.Init.DataPrescaler = CAN_DATA_PRES;
    hfdcan1.Init.DataSyncJumpWidth = CAN_DATA_SJW;
    hfdcan1.Init.DataTimeSeg1 = CAN_DATA_T1;
    hfdcan1.Init.DataTimeSeg2 = CAN_DATA_T2;
    hfdcan1.Init.MessageRAMOffset = 0;
    hfdcan1.Init.StdFiltersNbr = 1;
    hfdcan1.Init.ExtFiltersNbr = 0;
    hfdcan1.Init.RxFifo0ElmtsNbr = 5;
    hfdcan1.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
    hfdcan1.Init.RxFifo1ElmtsNbr = 0;
    hfdcan1.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
    hfdcan1.Init.RxBuffersNbr = 0;
    hfdcan1.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
    hfdcan1.Init.TxEventsNbr = 0;
    hfdcan1.Init.TxBuffersNbr = 0;
    hfdcan1.Init.TxFifoQueueElmtsNbr = 32;
    hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
    hfdcan1.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
    if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK) {
      Error_Handler();
    }

    void FDCAN_Config(FDCAN_HandleTypeDef * hfdcan)
    {
      FDCAN_FilterTypeDef sFilterConfig;

      /*Configure Rx filter */
      sFilterConfig.IdType = FDCAN_STANDARD_ID;
      sFilterConfig.FilterIndex = 0;
      sFilterConfig.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
      sFilterConfig.FilterType = FDCAN_FILTER_RANGE;

      // sFilterConfig.FilterID1 = 0x83;
      // sFilterConfig.FilterID2 = 0x83;
      sFilterConfig.FilterID1 = 0x01;
      sFilterConfig.FilterID2 = 0x770;

      while (HAL_FDCAN_ConfigFilter(hfdcan, &sFilterConfig) != HAL_OK) { }

      /*Configure global filter:
      Filter all remote frames with STD and EXT ID
      Reject non matching frames with STD ID and EXT ID */

      while (HAL_FDCAN_ConfigGlobalFilter(hfdcan, FDCAN_REJECT, FDCAN_REJECT,
                 FDCAN_FILTER_REMOTE, FDCAN_FILTER_REMOTE)
          != HAL_OK) { }

      /*Start the FDCAN module */
      while (HAL_FDCAN_Start(hfdcan) != HAL_OK) { }
      while (HAL_FDCAN_ActivateNotification(
                 hfdcan, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0)
          != HAL_OK) { }
    }
 
in main.c, i call FDCAN_Config(&hfdcan1) and FDCAN_Config(&hfdcan2) after MX_FDCAN1_Init() and MX_FDCAN2_Init().
 
Can anyone help me?
Thank you
2 REPLIES 2

Use the </> tool to paste code, you can also edit posts. Perhaps add the whole project as a .ZIP or on GitHub?

>>..but the system doesn't work.

That's not a helpful description of the problem. You're going to need to refine that a little.

You'll need to review the circuit, how the peripherals configured/behaving at the register level in the debugger. The interrupt handlers and call backs are not shown.

Make each work independently first, perhaps in Loop Back mode.

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Peter BENSCH
ST Employee

@UVagl.1 I've had the inserted code prettied up by a C Beautifier - it looks much more readable, doesn't it?

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