2021-10-22 03:13 AM
I'm trying to write to a single register of a LCD controller using the 16 Bit FMC peripheral in SRAM mode.
[update)
My assumption at the moment is that the controller writes 64 bits even the command STRH should only write a half word (16 bits).
When writing one single 16 bit word, the STM32H750VBT generates two #WR strobes within two #CS with alternating data in the second #CS sequence - for whatever reason I don't know. Reading from this address just works fine. One #RD, one #CS. I tried several options and timings, effect stays the same. CPU Cache is OFF. Has anyone an idea what I am doing wrong here? Thanks in advance!
I generated this init code with CubeMX:
SRAM_HandleTypeDef hsram1;
/* FMC initialization function */
void MX_FMC_Init(void)
{
/* USER CODE BEGIN FMC_Init 0 */
/* USER CODE END FMC_Init 0 */
FMC_NORSRAM_TimingTypeDef Timing = {0};
/* USER CODE BEGIN FMC_Init 1 */
/* USER CODE END FMC_Init 1 */
/** Perform the SRAM1 memory initialization sequence
*/
hsram1.Instance = FMC_NORSRAM_DEVICE;
hsram1.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
/* hsram1.Init */
hsram1.Init.NSBank = FMC_NORSRAM_BANK1;
hsram1.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
hsram1.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
hsram1.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;
hsram1.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
hsram1.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
hsram1.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
hsram1.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
hsram1.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
hsram1.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
hsram1.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
hsram1.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
hsram1.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
hsram1.Init.WriteFifo = FMC_WRITE_FIFO_DISABLE;
hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE;
/* Timing */
Timing.AddressSetupTime = 4;
Timing.AddressHoldTime = 4;
Timing.DataSetupTime = 1;
Timing.BusTurnAroundDuration = 8;
Timing.CLKDivision = 2;
Timing.DataLatency = 5;
Timing.AccessMode = FMC_ACCESS_MODE_A;
/* ExtTiming */
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
{
Error_Handler( );
}
/* USER CODE BEGIN FMC_Init 2 */
/* USER CODE END FMC_Init 2 */
}
The test code that writes one half word to the base address
for(;;) {
*((uint16_t*)0x60000000) = (uint16_t)0x5555;
HAL_Delay(100);
}
This compiles into:
_writeReg:
0x2401'3104: 0xb570 PUSH {R4-R6, LR}
0x2401'3106: 0x0004 MOVS R4, R0
0x2401'3108: 0x000d MOVS R5, R1
0x2401'310a: 0x0016 MOVS R6, R2
*((uint16_t*)0x60000000) = (uint16_t)0x5555;
??_writeReg_0:
0x2401'310c: 0xf245 0x5055 MOVW R0, #21845 ; 0x5555
0x2401'3110: 0xf05f 0x41c0 MOVS.W R1, #1610612736 ; 0x6000'0000
0x2401'3114: 0x8008 STRH R0, [R1]
HAL_Delay(100);
0x2401'3116: 0x2064 MOVS R0, #100 ; 0x64
0x2401'3118: 0xf7fc 0xfde2 BL HAL_Delay ; 0x2400'fce0
0x2401'311c: 0xe7f6 B.N ??_writeReg_0 ; 0x2401'310c
The signals look like this:
is alternating with this
Solved! Go to Solution.
2021-10-24 05:08 PM
For all who came to this topic because they have experienced the same issue, here is the fix:
"Remap FMC so that in MPU it is Device area"
https://community.st.com/s/question/0D53W00000HwJ8JSAV/stm32-fmc-sram-16bit-write-4-tims-a-call
Maybe ST could add a note in the next revision of the reference manual that users have to reconfigure the MPU to use 16 bit access to external memory devices.
2021-10-24 05:08 PM
For all who came to this topic because they have experienced the same issue, here is the fix:
"Remap FMC so that in MPU it is Device area"
https://community.st.com/s/question/0D53W00000HwJ8JSAV/stm32-fmc-sram-16bit-write-4-tims-a-call
Maybe ST could add a note in the next revision of the reference manual that users have to reconfigure the MPU to use 16 bit access to external memory devices.
2023-08-19 05:07 PM
It seems the solution link gives me "access denied". Has this page been moved?