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Timer-driven Single word Memory-to-Memory DMA transfer, can it be done in HAL??

Christopher Pappas
Senior II
Posted on February 22, 2017 at 17:04

Hello everyone again!

I have a special case scenario here that might be impossible to implement.

I wantto transfer (using HAL) from Flash memory to SRAM memory a single word at a time via DMA, using a timer to control the rate at which the transfer happens (using TRGO_Update), but amhaving no luck triggering the transfer at all.

Cananyone offerany suggestions, ideas, or insight on how to accomplish thisoperation in HAL?

Thanks!!

Christopher

#timer #dma #transfer #mem-to-mem

Note: this post was migrated and contained many threaded conversations, some content may be missing.
9 REPLIES 9
Posted on February 22, 2017 at 19:37

Which device? What have you done so far?

JW

Christopher Pappas
Senior II
Posted on February 22, 2017 at 20:19

Hi Jan,

It is the STM32F767ZI, and the project is being built on the NUCLEO-F767ZI board.

I modified the example 'DMAFlashtoRam'.

The timer (TIM9) is working, and the DMA is transferring from a FLASH buffer of constant words to a single word location in SRAM. I just can't seem to get the timer to control the rate of the DMA xfer (i.e. - it is always running in full speed rather than the rate of the TIM9 Update frequency).

Thanks for taking the time to assist me!

Christopher

Posted on February 23, 2017 at 01:15

Christopher,

  • I don't Cube/CubeMX so can't help with that
  • only DMA2 is capable of memory-to-memory transfers in the 'F7xx
  • each DMA Stream/Channel has a fixed specified trigger source, see DMA2 request mapping table in RM0410 - you have selected DMA2, Stream0 Channel0 - that's triggered by ADC1, so it's good e.g. to transfer the result of ADC conversion to memory
  • TIM9 is not capable to trigger DMA transfers. See TIMx_DIER register in the timers chapter(s). That's where you need to select/enable, which event within the timer will cause a respective DMA trigger
  • besides TIMx_DIER, go back to the DMA2 request mapping table - as you can see, only TIM1 and TIM8 can be used as triggers for DMA2
  • don't use a memory-to-memory mode of DMA. This sounds counterintuitive, but that is a mode which is not triggered from outside, but simply triggers itself permanently to yield as fast transfers as possible. That's what you've observed. Use either of the peripheral-to-memory of memory-to-peripheral modes, it does not matter which one. The direction then determines which address will go to which address register, but it's likely Cube will hide this for you (again, I don't Cube).
  • isn't there an example for timer-triggered-memory-to-whatever (most probably -to-GPIO) DMA?

JW

Posted on February 23, 2017 at 04:22

Thanks Jan!! Everything you suggested makes good sense. I am using TIM2, M2P, and DMA1. The request mapping table Channel 3 Stream 1 is triggered by TIM2_UP, so I chose that. I set TIM2_DIER to trigger on Update.

 Still not working yet (I can't get the DMA xfer to begin at all now), but on the right track.

Posted on February 23, 2017 at 09:00

I am using TIM2, M2P, and DMA1.

You can't use DMA1 for memory-to-memory transfers. As I said above, use DMA2 and TIM1 or TIM8.

JW

Posted on February 23, 2017 at 14:45

I am using Memory-to-Peripheral now (M2P), as I said before!

All the pieces of the puzzle are there in the code now, I just have to figure out Cube/HAL is stopping it from working.

Posted on February 23, 2017 at 14:55

Just do what I told you, don't use DMA1. I'll explain it later.

JW

Posted on February 24, 2017 at 21:45

There is a TEIF1 Stream x transfer error interrupt happening on the first word transfer.

I will leave it as is for now, unsolved. Maybe I'll come back to debugging it at a later date.

Posted on February 24, 2017 at 21:52

Without downloading those whopping 6.5MB - if you are using Direct Mode (i.e. FIFO off) and it's a FIFO error, then just ignore it (leave it disabled in the interrupt masks). You can find the explanation somewhere on this forum, and it's harmless.

JW