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Thread "Weird jitter in TIM4 -> DACs -> DMA1 waveform generator 32F417" is invisible

PHolt.1
Senior III

I have tried different browsers.

It was started by me and there have been some responses because I got notifications.

https://community.st.com/s/question/0D53W00001DlhkcSAB

10 REPLIES 10
PHolt.1
Senior III

I think I understand what you are getting at. I think you are suggesting implementing the first two DAC samples separately. That, I am sure, would work.

Someone else had a go at this project a few months ago. He proposed using another timer to measure the time delay between the +ve edge of the input and the +ve edge of the output, and adjust the sinewave table accordingly. This method would also automatically compensate for the delay in the DAC lowpass filter.

One problem with that method is that the error could be either size of zero but both cases will produce a positive count value. That makes controlling for minimum delay tricky. That's unless there is some way to use a counter so it counts up or down. I think there might be since the 32F4 supports quadrature decoding. I have done this many years ago (using the Z80 CTC) and it uses two counters. But that is complicated; I am trying to keep things simple.

My approach avoids feeding the output waveform into a comparator to pick up its zero crossings. So it saves 1 chip. And I wrote the whole thing in about 2 man-days which is pretty good.