The SPI RX data received is incorrect - STM32F411RE

[cchan.3]

Zoomed-in view of MISO:

Expected output: 0x0 0x0 0x0 0x58

We see the 0x58 being received on MOSI, but still not aligned with the clock. Probably, it is not being sampled correctly by STM32.

And importantly, the CS is not triggered before generating clock and transmitting data on MOSI

SPI configurations:

/* SPI1 parameter configuration*/
hspi1.Instance = SPI1;
hspi1.Init.Mode = SPI_MODE_MASTER;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_SOFT;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi1.Init.CRCPolynomial = 10;
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
Error_Handler();
}

The rx_buff received all zeroes.

Please help us here.

[TDK]

This isn't a configuration issue.

Show more of the code around transmitting/receiving SPI, including how you're controlling the CS pin. Show on the scope where CS goes low, looks like it's low for the entire transaction to me.

Also note that MOSI is being sent, not received. Reception for the master is on MISO.

Work on getting it to work with blocking transfers (HAL_SPI_TransmitReceive) before graduating to DMA.

[waclawek.jan]

Looks more hardware issue to me: incorrect ground/return, short to other pins, incorrect voltage level of slave...

JW

[cchan.3]

Thanks for your suggestions. 

I myself resolved it. I have CMSIS v2-based FreeRTOS in my implementation. When FreeRTOS is disabled, I got the right data.

The systick is used by both STM32 HAL and FreeRTOS. I now enabled a different timer for HAL and it worked.

[cchan.3]

Show more of the code around transmitting/receiving SPI, including how you're controlling the CS pin. Show on the scope where CS goes low, looks like it's low for the entire transaction to me.

> I configured CS as SPI_NSS_SOFT/ SPI_NSS_HARD_OUTPUT and do not toggle it in the code. Irrespective of the configuration, I could see my application is working fine but on the logic analyzer, the CS never gets toggled. When I toggle CS before TX/RX, it works properly and logic analyzer shows the toggling of the pin.

Also note that MOSI is being sent, not received. Reception for the master is on MISO.

> Sorry about that.