The PLLon and PLLRdy in the RC register of THE RCC based on STM32H750 are out of sync

[WenZhengMing]

Under normal circumstances, THE PLLRdy of RCC is controlled by hardware. When PLLON is enabled by software, PLLRdy is set by hardware. When the software does not enable PLLON, PLRdy is cleared by the hardware. I now have a device with a Farad capacitor (which can supply power to the device for 20 to 30 seconds when the external power supply fails). When conducting power-on and power-off test, power on for 5s, power off for 25s, and continue. After a period of testing, it was found that the RCC module initialization failed. RCC RC register, PLLON is not set, but PLLRdy is always set. By calling the soft reset systemRest command, the RCC RC register value remains unchanged, which will cause RCC initialization to fail.

 

Q: 1)what's the probable cause of the out-sync between PLLON and PLLRdy?

2)Is it possible to reset the RCC register by software without completely powering down the external hardware? Or is there a way to solve this problem?

[Piranha]

Check the respective SVD file if those PLL2RDY/PLL3RDY flags are at correct bit positions at all. Unfortunately SVD files are full of errors also...

[WenZhengMing]

first of all, thank you Piranha a lot for replying my question,😂 ! Actually, I never doubt about the Correctness of the SVD files, cause mostly the PLLxRdy & PLLxOn signals run in a right way. Only when it runs in the test condition(as power -on/off test), this phenomenon appears rarely.😳