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SysTick and clock configuration

freya17365
Associate II

Hi to all,
I have a problem with clock and systick configuration.
I am using an STM32F303CBT MCU and STMCubeIDE.
At present my program realize a blinking led, but if I do not activate SysTick after a randon mumber of blinking the led stuck on or off indefinitely.
If I try to activate systick, the SysTick_Handler() works five times and then it stucks.
Here is my code:


void SystemInit()
{
/* Clock init */
/*-------------------------------- HSI Configuration -----------------------*/
if((RCC->CFGR & RCC_CFGR_SWS_Msk) != RCC_CFGR_SWS_HSI) // If HSI is not used as SystemClock
{
RCC->CFGR &= ~RCC_CFGR_SW_Msk; // Select HSI as SystemClock
RCC->CFGR |= RCC_CFGR_SW_HSI;
while((RCC->CFGR & RCC_CFGR_SWS_Msk) != RCC_CFGR_SWS_HSI); // Wait for HSI ready
}
if(RCC->CR & RCC_CR_PLLON) RCC->CR &= ~RCC_CR_PLLON; //Disable PLL
// while(RCC->CR & RCC_CR_PLLRDY); // Wait for PLL disabled

RCC->CFGR &= ~(RCC_CFGR_MCO_Msk | RCC_CFGR_USBPRE_Msk | RCC_CFGR_PLLMUL_Msk | RCC_CFGR_PLLSRC_Msk | RCC_CFGR_PPRE2_Msk | RCC_CFGR_PPRE1_Msk | RCC_CFGR_HPRE_Msk | RCC_CFGR_SW_Msk); //Clear register's bits
RCC->CFGR |= RCC_CFGR_MCO_HSI | RCC_CFGR_USBPRE_DIV1 | RCC_CFGR_PLLMUL12 | RCC_CFGR_PLLSRC_HSI_DIV2 | RCC_CFGR_PPRE2_DIV1 | RCC_CFGR_PPRE1_DIV2 | RCC_CFGR_HPRE_DIV1 | RCC_CFGR_SW_PLL;
RCC->CR |= RCC_CR_PLLON; //PLLON
while(!(RCC->CR & RCC_CR_PLLRDY)); // Wait for PLL enabled

if(!(RCC->CFGR & RCC_CFGR_SWS_PLL))
{
RCC->CFGR &= ~RCC_CFGR_SW_Msk;
RCC->CFGR |= RCC_CFGR_SW_PLL; // if PLL is not SystemClock, set PLL as SystemClock
}
mysysclock = 48000; // in MHz

RCC->CIR = 0x009F0000;
return;
}

 

int main(void)
{
uint32_t ccc=0;
myled.LedOff(LED0);
/* SysTick end of count event each 0,1 sec */
SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
SysTick_Config(100*mysysclock);

while(1)
{
ccc++;
}
}

 

extern "C" void SysTick_Handler()
{
myled.Toggle(LED0);
return;
}


I compared it with a similar one generated with CubeMX and I think I did forgot nothing (but probally I failed)

Where can I check where i the problem?

Thank you
Freya

 

3 REPLIES 3

Not sure I'm interested in unpacking others register level code, got to own that stuff.

Watch that the SysTick register is only 24-bit wide, and a down count.

Should perhaps be using the DIV8 clock source for longer delays.

Perhaps config at a register level too, suspect the library code is going to make it's own setting of the clock source.

Try running without configuring the RCC/PLL, the STM32F3 should be running of HSI by default.

Dump out the RCC and SYSTICK registers, confirm as expected, compare working vs not working.

Watch for other issues, like stuck in HardFault_Handler, or some other interrupt storm at high priority blocking SysTick

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TDK
Guru

 

Are you setting flash wait states? Surely at 48 MHz more than 0 wait states are required. Maybe not.

Should be able to run code in debug mode, hit pause, and examine the state of the system.

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