Strange CPU clock frequency on STM32F401 board

[eigenroot]

Posted on December 23, 2015 at 04:05

Updated: change the title from ADC sampling frequency to CPU clock frequency. 

I use a timer to trigger ADC sampling on STM32F401, and the interrupt service routine of ADC will toggle a GPIO pin so that I can measure the ADC sampling frequency using an oscilloscope (which should equal the timer frequency). However the results I get from two scenarios, one being on a Discovery board and the other on my own board, are different. I am wondering if it has something to do with the crystal connection. In both cases, the CPU frequency is set to be 84 MHz, and the timer frequency is scaled down to 16 kHz. A 8MHz external crystal is also used. I first test on

http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1199/PF259098

 which uses STM32F401VCT6. The GPIO pin toggles with 16 kHz frequency. So I think the code is working. After that I make my own board with the MCU being STM32F401RBT6. I can program and debug the code via SWD without problem, but the GPIO pin toggles with ~5.1kHz frequency. The code is largely same -- the only difference is I use a different ADC pin (thus the corresponding change in the firmware) which should not matter. The STM32F401 part of schematic of my own design is shown

http://i.imgur.com/eLTpYfQ.png

. The part of layout related to crystal connection on my board is

http://i.imgur.com/A2h7a34.png

. The 8MHz crystal on my board is

http://www.mouser.com/ProductDetail/ABRACON/ABLS-8000MHZ-B2-T/?qs=/ha2pyFaduh7fNnNr/IxjN7tTHkouOvMnkLt1rmAOqrAHiWb%252brJfnw%3d%3d

which needs 18pF loading capacitors. I use two 5% 18pF capacitors. I have probed the oscillator pin with an oscilloscope (despite the probe capacitance may play a role). I can see 8MHz sine-wave like voltage signals, but the amplitude is not from rail to rail.The crystal part of schematic of STM32F401 discovery board is

http://i.imgur.com/ZXHwWvv.png

. You can see it has a 220 Ohm series resistor on the PH1-OSC_OUT pin, which I don't have on my board. Could anyone please advise what I may have done wrong?   #adc #stm32f4 #stm32f4 #discovery

[eigenroot]

Posted on January 01, 2016 at 17:50

The cause was PLL misconfiguration after reviewing SystemInit() again. Now the clock is working correctly. 

[Tesla DeLorean]

Posted on December 23, 2015 at 04:32

Suggest you bring the part up at 84 MHz using the HSI+PLL. Enable the HSE, check if it flags as ready, and output the HSE clock via MCO (PA8) to confirm what the part is seeing.

You can use RCC_GetClocksFreq() to confirm the current running state. Make sure HSE_VALUE reflects the 8MHz used.

[eigenroot]

Posted on December 24, 2015 at 01:09

Thanks for your reply. 

The system clock frequency is 26.88 MHz read from RCC_GetClocksFreq(), which is ~3.125x slower than 84MHz. This is consistent with the ratio of my ADC clock ~ 5.12 kHz over 16 kHz which is what it is supposed to be. So the slowing down of system clock is the cause of slower ADC sampling frequency. Could you please elaborate a little more on how to use HSI+PLL to bring up the system? I followed the example code of STM32F401 discovery board which used 8MHz external crystal. Related tutorial links will be great. 

[raptorhal2]

Posted on December 26, 2015 at 17:19

I followed the example code of STM32F401 discovery board which used 8MHz external crystal.

You may have spotted the problem already, but it may be worth repeating here for everyone since you are the umpteenth person to overlook the cause. The Discovery board does use an 8 MHz source (comes from the F103 on the board) but the code example is for the Eval board which uses a 25 MHz HSE, hence the 8/25 frequency ratio, and Clive1's advice to check HSE definitions. See the opening comments in system_stm32F4xx.c for more information. Cheers, Hal

[re.wolff9]

Posted on December 26, 2015 at 19:53

I'm not familiar with 'cube so I don't know how to switch from HSE to HSI. However your capacitors(calculations) are not correct. According to the crystal the capacitance is: Ctot = Cpar + (C1==C2), where the == is meant to mean: ''in series with'' which follows the resistor formula for parallel resistors. Cpar could be guessed at 7pF, so you're getting 7+9 = 16pF of loading on the crystal. 

I've been doing it wrong just like you for a long time. Usually doesn't result in measurable differences. (but using expensive(?) 5% capacitors seems unnecessary when you have to guess the Cpar as ''5 to 10 pF, maybe seven?'') 

[eigenroot]

Posted on December 28, 2015 at 07:33

I was using Keil and did pass HSE_VALUE=8000000 in the C/C++ preprocessor window. I even hard coded this line in stm32f4xx.h:

#if !defined  (HSE_VALUE)   #define HSE_VALUE    ((uint32_t)8000000)  #endif /* HSE_VALUE */However, the results were the same for my custom made board, that is, CPU frequency is still 3.12x slower. Note that I used the same code on STM32F401 discovery board, and the CPU frequency was correct (84MHz). So I am thinking it may be something else. Maybe because of the absence of peripheral hardware/sensors that were on discovery board, somehow the HSE_VALUE was set back to 25000000 indirectly? I really don't have too many clues here.